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    Physical Design Engineer Intern - Boise, United States - Idaho State Job Bank

    Idaho State Job Bank
    Idaho State Job Bank Boise, United States

    1 week ago

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    Physical Design Engineer Intern at Intel in Boise, Idaho, United States Job Description Job Description The world is transforming - and so is Intel.

    Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower people's digital lives.

    Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful.

    Intel's IP group is looking for an Physical Design Engineer to contribute in the high performance power solutions IP space.

    We are designing innovative IP solutions across multiple technologies and unique architectures that fuels Intel's servers, clients and graphics microprocessors.

    You will collaborate with architects, logic designers, and analog engineers in evaluating implementation details of complex design features.

    You will perform all aspects of the SoC design flow from high-level design through synthesis, place and route, timing analysis and power reduction.

    Your responsibilities may include but not be limited to:
    + Family and/or block-level floor planning, Power supply and power grid planning and analysis, Logic synthesis of design blocks. + Formal Equivalence Verification (FEV), Clocking network planning and analysis, Auto Place-and
    • Route (APR) using Synopsys ICC tools.
    + Timing verification using Synopsys Prime Time, + Physical verification
    • Layout vs.
    Schematic (LVS), Design Rule Checks (DRC), Electrical Rule Checks (ERC), and Design for Manufacturability checks (DFM), + Reliability Verification Debug and resolution of integration issues at parent level. + Completion of design reviews and design signoff flows and assist in the preparation of the full-chip layout design database for introduction to manufacturing.

    In addition to the qualifications listed above the ideal candidate will also have:
    + Excellent analytical and problem-solving skills. + Strong verbal/written communication skills. + Effective team player with continuous learning mindset. + Willingness to balance multiple tasks. + Willingness to work in a fast-paced environment and have as much fun and growth as possible in the process. Qualifications You must possess the below minimum qualifications to be initially considered for this position. Experience listed below would be obtained through a combination of your schoolwork, classes, research and/or relevant previous To view full details and how to apply, please login or create a Job Seeker account
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