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    Senior UVM Verification Engineer - Santa Clara, CA, United States - Celestial AI

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    Description


    About Celestial AIAs the industry strives to meet the demands of the AI workloads, bottlenecks in data transfers between processors and memory have hindered progress.

    The Photonic Fabric based Memory Fabric provides an optically scalable solution to the 'Memory Wall' problem, enabling tens of Terabytes of memory capacity at full HBM bandwidths with low tens of nanoseconds of latency and extremely low power.

    The Photonic Fabric based Compute Fabric enables Terabyte class bandwidth between compute nodes at low latency and power. Photonic Fabric delivers a transformative leap in AI system performance, ten years more advanced than existing technologies.


    Job Description:


    In this role, you will be driving the verification effort and methodology while working closely with architects, designers, and ML software engineers.

    You will be creating a UVM testbench environment for a custom AI processor, including testbenches, tests, regressions, and functional coverage to achieve zero bug escapes.

    The UVM environment will co-exist with AMS testbenches to provide strong verification of the novel Celestial AI architecture that enables higher scalable performance than traditional designs.

    The extended environment you create will be used to cover iterative and fast-paced HLS-generated code.


    ESSENTIAL DUTIES AND RESPONSIBILITIES:


    Create UVM testbench Environment, interfacing with Digital AMS and SoftwareDevelop infrastructure, testbenches, tests, and coverage to ensure proper functionalityCollaborate with ASIC and software design teams to develop testplansDesign, develop, and maintain modular and reusable UVM testbenches for Celestial ML custom blocks.

    Confirm test completeness through code and functional coverageProvide technical leadership and mentoringQUALIFICATIONS:

    Requires 8+ years of experience with UVM Testbench InfrastructureIn depth knowledge of UVM testbenches, stimulus, constraints, and testingExperience with DDR, preferredExtensive experience with System Verilog, Python, and some experience with C/C++Knowledge of / Experience in Network ProtocolsExperienced with random testbench implementation, code and functional coverageSelf-motivated with strong technical skills, as well as a great team player and effective communicatorPrefer extensive knowledge of Python test infrastructure integrating Jenkins, git, JIRAExperience with PCIE, AXI-4, ARM standards beneficialExperience with formal verification preferredHistory of high quality first silicon successSome knowledge of ML, AI trends, and HW accelerator landscape, preferred.

    BSEE +10 years relevant experience. MSEE preferred.


    Location:

    San Francisco Bay Area or Orange County, CAFor California location:As an early startup experiencing explosive growth, we offer an extremely attractive total compensation package, inclusive of competitive base salary and a generous grant of our valuable early-stage equity.

    The target base salary for this role is approximately $160, $185, The base salary offered may be slightly higher or lower than the target base salary, based on the final scope as determined by the depth of the experience and skills demonstrated by candidate in the interviews.

    We offer great benefits (health, vision, dental and life insurance), collaborative and continuous learning work environment, where you will get a chance to work with smart and dedicated people engaged in developing the next generation architecture for high performance computing.

    Celestial AI Inc. is proud to be an equal opportunity workplace and is an affirmative action employer.#LI-Onsite

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