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    ASIC Verification Engineer - Santa Clara, United States - Penn Foster Inc

    Penn Foster Inc
    Penn Foster Inc Santa Clara, United States

    3 weeks ago

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    Description
    The NVIDIA Clocks Team is looking for an ASIC Verification engineer to validate CPU, GPU and SOC clocks design. Our team is committed to delivering high-quality clocking and reset logic to various units in SOC and GPU ASIC. The complexity of the clocks and resets has increased many folds. This requires sophisticated verification techniques to deliver a bug free clock design that go into our chips.

    The chips power our product lines ranging from Data Centers, Consumer graphics to Self-driving cars and the growing field of artificial intelligence.

    Modern clocking verification solutions need to be innovative, ensure quality in covering the sophisticated design specifications and balance the constraints on infrastructure, re-usability, testing speed and multi-platform support.


    What you'll be doing:


    Own validation of Clocking structures in Tegra and GPU ASIC products from start to finish, including test plan development, automation, validation flows development, coverage metrics, test execution, bug identification/fix and productization.

    Tackle Sophisticated problems and develop a scalable solution that works across platform.
    Hands on industry-standard tools and innovative verification methodologies. This includes coding in System Verilog, UVM, C++, Perl, Python and NVIDIA custom compilers and tools.

    Partnering closely with our design team to understand our architecture and the collaborate with Quality Assurance engineers to deliver great test coverage and improve the Hardware quality.

    Coordinate with internal and external teams across time zones.

    What we need to see:
    BS or MS in Electrical/Computer Engineering, or equivalent experience.
    Good understanding of Logic Design and Architecture.
    Exposure to design and verification tools (VCS or equivalent simulator tools; debug tools like Verdi, Debussy, GDB).
    Background in building testbench environments for unit level verification.
    Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies (UVM).
    Strong coding skills in System Verilog, scripting languages (Perl/python) and C++.
    Ability to collaborate and work with multiple groups.
    Ways to stand out from the crowd:

    Passion for Verification and desire to break things highly desireable.
    Prior Verification experience is highly desireable.

    We have some of the most forward-thinking and hardworking people in the world working for us and, due to outstanding growth, our world-class engineering teams are growing fast.

    If you are creative, curious, and motivated with real passion for technology, we want to hear from you

    The base salary range is $92,000 - $172,500. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

    You will also be eligible for equity and

    benefits

    .

    NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer.

    As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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