- Define DFT strategy and methodologies
- Design the DFT features
- Define test structures, debug structures, and test plans
- Create test vectors or oversee their creation
- Collaborate with physical design team to close requirements
- Validate DFT requirements are being met
- Work with designers to increase test coverage, debug observability and flexibility
- Verify post-PD designs meet DFT requirements
- Work with verification engineers, stepping in to do run tests when needed
- 3 to 6 years of experience
- DFT
- Scan Insertion
- JTAG
- iJTAG
- MBist
- SSN (stream network)
- SMS
- Some Design Verification experience
- UVM
- System Verilog programming
- Experience working with test benches
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DFT Verification Engineer - Santa Clara, United States - Ursus Inc
Description
JOB TITLE: DFT Verification Engineer**TOP 3 SKILLS:** DFT/Mbist, Scan Insertion, Design Verification
LOCATION: Santa Clara, CA or Austin, TX
DURATION: Direct
RATE RANGE: $160,000 - $200,000
SUMMARY:
Rivos supports the intense requirements of the large language models and data analytics that will remake the enterprise, by providing the full solution of optimized chips combining RISC-V CPUs and a Data Parallel Accelerator, a reference multi-chip OCP modular server, and a full firmware-to-application open software stack. Customer workloads are easily deployed using their existing models giving an immediate TCO benefit.
RESPONSIBILITIES: