Jobs
>
Santa Clara

    Design Verification Engineer - Santa Clara, United States - Capgemini Engineering

    Capgemini Engineering
    Capgemini Engineering Santa Clara, United States

    1 week ago

    Default job background
    Description

    We are seeking a Design Verification Engineer with below skills.

    • Total 10 years of experience in UVM based verification.
    • System Verilog assertions experience.
    • Familiarity with C/C++ model integration in verification environments.
    • Debug skills at IP and subsystem level.

    Good to have:

    • GLS verification knowledge.
    • Low power UPF verification.
    • ARM based SoC level verification experience.
    • UVM/SystemVerilog/C/C++/Python.
    • Exp with ARM Cortex , LPF Verification , Image processing design familiarity , GLS.
    • Writing UVM test benches , System Verilog.
    • Writing C/C++ code or Python code, Development of subsystems using ARM.
    • IP and SOC level Verification.
    • working on protocols like AMBA , AXD I2C

    Life at Capgemini

    Capgemini supports all aspects of your well-being throughout the changing stages of your life and career. For eligible employees, we offer:

    • Flexible work
    • Healthcare including dental, vision, mental health, and well-being programs
    • Financial well-being programs such as 401(k) and Employee Share Ownership Plan
    • Paid time off and paid holidays
    • Paid parental leave
    • Family building benefits like adoption assistance, surrogacy, and cryopreservation
    • Social well-being benefits like subsidized back-up child/elder care and tutoring
    • Mentoring, coaching and learning programs
    • Employee Resource Groups
    • Disaster Relief

    About Capgemini Engineering

    World leader in engineering and R&D services, Capgemini Engineering combines its broad industry knowledge and cutting-edge technologies in digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of the rest of the Group, it helps clients to accelerate their journey towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries across sectors including Aeronautics, Space, Defense, Naval, Automotive, Rail, Infrastructure & Transportation, Energy, Utilities & Chemicals, Life Sciences, Communications, Semiconductor & Electronics, Industrial & Consumer, Software & Internet.

    Capgemini Engineering is an integral part of the Capgemini Group, a global leader in partnering with companies to transform and manage their business by harnessing the power of technology. The Group is guided every day by its purpose of unleashing human energy through technology for an inclusive and sustainable future. It is a responsible and diverse organization of over 360,000 team members in more than 50 countries. With its strong 55-year heritage and deep industry expertise, Capgemini is trusted by its clients to address the entire breadth of their business needs, from strategy and design to operations, fueled by the fast evolving and innovative world of cloud, data, AI, connectivity, software, digital engineering and platforms. The Group reported in 2022 global revenues of 22 billion.

    Get the Future You Want |

    Disclaimer

    Capgemini discloses salary range information in compliance with state and local pay transparency obligations. The disclosed range represents the lowest to highest salary we, in good faith, believe we would pay for this role at the time of this posting, although we may ultimately pay more or less than the disclosed range, and the range may be modified in the future. The disclosed range takes into account the wide range of factors that are considered in making compensation decisions including, but not limited to, geographic location, relevant education, qualifications, certifications, experience, skills, seniority, performance, sales or revenue-based metrics, and business or organizational needs. At Capgemini, it is not typical for an individual to be hired at or near the top of the range for their role. The base salary range for the tagged location is $89K - $180K / year. This role may be eligible for other compensation including variable compensation, bonus, or commission. Full time regular employees are eligible for paid time off, medical/dental/vision insurance, 401(k), and any other benefits to eligible employees. Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, or any other form of compensation that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Companys sole discretion, consistent with the law.

    Capgemini is an Equal Opportunity Employer encouraging diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law.

    This is a general description of the Duties, Responsibilities and Qualifications required for this position. Physical, mental, sensory or environmental demands may be referenced in an attempt to communicate the manner in which this position traditionally is performed. Whenever necessary to provide individuals with disabilities an equal employment opportunity, Capgemini will consider reasonable accommodations that might involve varying job requirements and/or changing the way this job is performed, provided that such accommodations do not pose an undue hardship.

    Capgemini is committed to providing reasonable accommodations during our recruitment process. If you need assistance or accommodation, please reach out to your recruiting contact.

    Click the following link for more information on your rights as an Applicant

    Applicants for employment in the US/Canada must have valid work authorization that does not now and/or will not in the future require sponsorship of a visa for employment authorization in the US/Canada by Capgemini.

  • ACL Digital

    Verification Engineer

    2 weeks ago

    ACL Digital Santa Clara, United States

    Job Description : We need someone familiar with UVM to run and debug tests. If they are capable, we will also ask them to write some testbench modules and components. Perhaps the most important thing is that they are diligentand good at communicating what they find and where the ...

  • Cynet Systems Inc

    Verification Engineer

    1 week ago

    Cynet Systems Inc Santa Clara CA, United States Full time, contract

    Job Role Verification EngineerJob Type Contract Job Location Santa Clara CA (or) Job DescriptionVerification Engineer for Memory Controller · • Significant UVM SystemVerilog experience in complex test-benches · • Experience working with DRAM controller PHYs memory models is prefe ...

  • Broadcom Corporation

    Verification Engineer

    1 week ago

    Broadcom Corporation San Jose, United States

    Please Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · Job duties include: Veri ...

  • Broadcom Corporation

    Verification Engineer

    1 week ago

    Broadcom Corporation San Jose, United States

    Please Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · The ASIC Product Divisio ...

  • Broadcom Corporation

    Verification Engineer

    1 day ago

    Broadcom Corporation San Jose, United States

    Please Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · The ASIC Product Divisio ...

  • Broadcom Corporation

    Verification Engineer

    23 hours ago

    Broadcom Corporation San Jose, United States

    Please Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · Job duties include: Veri ...

  • Broadcom Corporation

    Verification Engineer

    1 week ago

    Broadcom Corporation San Jose, United States

    Please Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · The ASIC Product Divisio ...

  • Ursus Inc

    Accelerator Verification Engineer

    1 week ago

    Ursus Inc Santa Clara, United States

    JOB TITLE: Accelerator Verification Engineer · LOCATION: (US) Santa Clara CA , Austin TX, Portland OR, Fort Collins CO · QUALIFICATIONS: · Join a cutting-edge hardware startup in Silicon Valley as a Silicon Verification Engineer. Our mission is to reimagine silicon and create ...

  • Synopsys

    Verification Engineer

    2 weeks ago

    Synopsys Sunnyvale, United States

    Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world's broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabiliti ...

  • Capgemini Engineering

    Design Verification Engineer

    1 week ago

    Capgemini Engineering Santa Clara, United States

    Job Role: Design Verification Engineer · Location: Santa Clara, California · Job description: · We are seeking a Design Verification Engineer for our full-time role with Capgemini Engineering. · Key responsibilities: · General DV skills, someone who can understand the specs, work ...

  • Mirafra Technologies

    Design Verification Engineer

    1 week ago

    Mirafra Technologies Santa Clara, United States

    Looking to add DV Engineers in Irvine, San Diego and Santa Clara. · On going needs additional 10 engineers in team. · Position detail: SOC verification · Experience level : 5-20 years · Architect block and full-chip verification environments using HVLs and constrained random ...

  • Penn Foster Inc

    ASIC Verification Engineer

    1 week ago

    Penn Foster Inc Santa Clara, United States

    The NVIDIA Clocks Team is looking for an ASIC Verification engineer to validate CPU, GPU and SOC clocks design. Our team is committed to delivering high-quality clocking and reset logic to various units in SOC and GPU ASIC. The complexity of the clocks and resets has increased ma ...

  • NVIDIA

    Senior Verification Engineer

    2 weeks ago

    NVIDIA Santa Clara, United States

    We are now looking for a Senior Verification Engineer for our Tegra groupNVIDIA is seeking outstanding Senior Verification Engineers to verify the design and implementation of the world's leading SoC's and GPU's. · The full job description covers all associated skills, previous ...

  • Capgemini Engineering

    Design Verification Engineer

    1 week ago

    Capgemini Engineering Santa Clara, United States

    We are seeking a Design Verification Engineer with below skills. · Total 10 years of experience in UVM based verification. · System Verilog assertions experience. · Familiarity with C/C++ model integration in verification environments. · Debug skills at IP and subsystem level. · ...

  • NVIDIA

    Senior Verification Engineer

    2 weeks ago

    NVIDIA Santa Clara, United States

    We are now looking for a Senior Verification Engineer for our Tegra group · NVIDIA is seeking outstanding Senior Verification Engineers to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a mu ...

  • Capgemini Engineering

    Design Verification Engineer

    1 week ago

    Capgemini Engineering Santa Clara, United States

    We are seeking a Design Verification Engineer with below skills. · Interested in this role You can find all the relevant information in the description below. · Total 10 years of experience in UVM based verification. · System Verilog assertions experience. · Familiarity with ...

  • Intel

    Design Verification Engineer

    2 weeks ago

    Intel Santa Clara, United States

    **Job Description** · **Do Something Wonderful** · Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea ...

  • Mirafra Technologies

    Design Verification Engineer

    1 week ago

    Mirafra Technologies Santa Clara, United States

    Looking to add DV Engineers in Irvine, San Diego and Santa Clara. · Make sure to apply quickly in order to maximise your chances of being considered for an interview Read the complete job description below. · On going needs additional 10 engineers in team. · Position detail: S ...

  • NVIDIA

    Senior Verification Engineer

    2 weeks ago

    NVIDIA Santa Clara, United States

    Senior Verification Engineer - Displays page is loaded · Senior Verification Engineer - Displays · Apply · locations · US, CA, Santa Clara · time type · Full time · posted on · Posted Today · job requisition id · JR · We are looking for a Senior Verification Engineer t ...

  • NVIDIA

    Senior Verification Engineer

    1 week ago

    NVIDIA Santa Clara, United States

    Senior Verification Engineer - Tegra page is loaded · Senior Verification Engineer - Tegra · Apply · locations · US, CA, Santa Clara · time type · Full time · posted on · Posted 2 Days Ago · job requisition id · JR · We are now looking for a Senior Verification Enginee ...