Jobs
>
Santa Clara

    Design Verification Engineer - Santa Clara, United States - Intel

    Intel
    Intel Santa Clara, United States

    3 weeks ago

    Intel background
    Description

    Job Description

    Do Something Wonderful
    Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel ) or the links below

    • Life at Intel )
    • Diversity at Intel )

    The Network and Edge group (NEX) at Intel drives the software-defined transformation of the world's infrastructure - in data centers, in networks, and at the edge.

    We are a team of problem solvers, experimenters, and innovators who are dedicated to designing the network technologies that currently lead and continue to transform data-center and AI ecosystems.

    We are seeking an experienced hardware security architect/researcher responsible for designing, developing, and implementing secure hardware solutions for our advanced SoC platforms.

    A Design Verification Engineer in the Network and Edge group:

    • Performs functional logic verification of an integrated SoC to ensure design will meet specifications.
    • Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.
    • Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs.
    • Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests.
    • Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features.
    • Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
    • Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage.
    • Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products.
    In addition to the qualifications listed below the ideal candidate will also have the following traits:

    • Willingness to multi-task and manage several activities at once.
    Strong attention to detail and organizational skills to track and communicate direction/status.

    • Willingness to work in an unstructured start-up like environment with minimal supervision.
    • Strong problem-solving abilities to help drive resolution of unforeseen issues.
    • Excellent communication skills both verbally and non-verbally in an effective, professional, clear, and honest manner with team members, customers, and leadership.
    Able to deal with ambiguity, cope with change and can comfortably handle risk and uncertainty.

    • Be self-driven and motivated.
    • Willingness to lead a highly matrixed, cross-organizational team directly tied to the development, implementation and/or upgrade of technology or products for external customers.

    Qualifications

    What we need to see (Minimum Qualifications):

    • Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 5 years of industry work experience, or- Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 4 years of industry work experience, or- PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 2 years of related work experience.
    • 4 years of relevant experience.
    • 3 years of experience in using Formal Verification techniques and leading industry standard tools to close Verification of designs with relevant metrics and quality.
    • 3 years of experience in relevant Pre-Silicon validation position having gone through multiple project cycles to gather in-depth experience.

    How to Stand out (Preferred Qualifications):

    • Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 10 years of industry work experience, or- Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 8 years of industry work experience, or- PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 6 years of related work experience.
    • Experience with PCIe, Power Management, Ethernet, Network packet processing. Should have led a team of engineers for entire verification cycle for an IP or a sub system.
    • 3 years of experience in logic design verification with various tools and methodologies including System Verilog, Perl, OVM/UVM, logic simulators, and coverage tools.
    • 3 years of experience with pre-silicon simulation tool flows such as Synopsys VCS Verdi and DVE.
    • 3 years of experience in OVM/UVM for developing verification test benches and constrained random verification.
    Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

    Amazing Benefits
    Here at Intel, we invest in our people.

    Beyond health, dental, and retirement benefits, Intel's benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment.

    Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program.

    Find more information about our Amazing Benefits here ) :


    Inside this Business Group

    The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership.

    It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.


    Posting Statement

    All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.


    Benefits
    We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. )

    Annual Salary Range for jobs which could be performed in US, California:
    $144,501.00-$217,311.00
    *Salary range dependent on a number of factors including location and experience

    Working Model

    This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.


    In certain circumstances the work model may change to accommodate business needs.
  • ACL Digital

    Verification Engineer

    2 weeks ago

    ACL Digital Santa Clara, United States

    Job Description : We need someone familiar with UVM to run and debug tests. If they are capable, we will also ask them to write some testbench modules and components. Perhaps the most important thing is that they are diligentand good at communicating what they find and where the ...

  • Cynet Systems Inc

    Verification Engineer

    1 week ago

    Cynet Systems Inc Santa Clara CA, United States Full time, contract

    Job Role Verification EngineerJob Type Contract Job Location Santa Clara CA (or) Job DescriptionVerification Engineer for Memory Controller · • Significant UVM SystemVerilog experience in complex test-benches · • Experience working with DRAM controller PHYs memory models is prefe ...

  • Broadcom Corporation

    Verification Engineer

    4 days ago

    Broadcom Corporation San Jose, United States

    Please Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · The ASIC Product Divisio ...

  • Broadcom Corporation

    Verification Engineer

    4 days ago

    Broadcom Corporation San Jose, United States

    Please Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · Job duties include: Veri ...

  • Broadcom Corporation

    Verification Engineer

    1 week ago

    Broadcom Corporation San Jose, United States

    Please Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · The ASIC Product Divisio ...

  • Broadcom Corporation

    Verification Engineer

    2 weeks ago

    Broadcom Corporation San Jose, United States

    Please Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · The ASIC Product Divisio ...

  • Broadcom Corporation

    Verification Engineer

    1 week ago

    Broadcom Corporation San Jose, United States

    Please Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · Job duties include: Veri ...

  • Synopsys

    Verification Engineer

    2 weeks ago

    Synopsys Sunnyvale, United States

    Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world's broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabiliti ...

  • Mirafra Technologies

    Design Verification Engineer

    2 weeks ago

    Mirafra Technologies Santa Clara, United States

    Looking to add DV Engineers in Irvine, San Diego and Santa Clara. · On going needs additional 10 engineers in team. · Position detail: SOC verification · Experience level : 5-20 years · Architect block and full-chip verification environments using HVLs and constrained random ...

  • Capgemini Engineering

    Design Verification Engineer

    1 week ago

    Capgemini Engineering Santa Clara, United States

    We are seeking a Design Verification Engineer with below skills. · Total 10 years of experience in UVM based verification. · System Verilog assertions experience. · Familiarity with C/C++ model integration in verification environments. · Debug skills at IP and subsystem level. · ...

  • Mirafra Technologies

    Design Verification Engineer

    1 week ago

    Mirafra Technologies Santa Clara, United States

    Looking to add DV Engineers in Irvine, San Diego and Santa Clara. · Make sure to apply quickly in order to maximise your chances of being considered for an interview Read the complete job description below. · On going needs additional 10 engineers in team. · Position detail: S ...

  • Ursus Inc

    Accelerator Verification Engineer

    2 weeks ago

    Ursus Inc Santa Clara, United States

    JOB TITLE: Accelerator Verification Engineer · LOCATION: (US) Santa Clara CA , Austin TX, Portland OR, Fort Collins CO · QUALIFICATIONS: · Join a cutting-edge hardware startup in Silicon Valley as a Silicon Verification Engineer. Our mission is to reimagine silicon and create ...

  • NVIDIA

    Senior Verification Engineer

    2 weeks ago

    NVIDIA Santa Clara, United States

    We are now looking for a Senior Verification Engineer for our Tegra groupNVIDIA is seeking outstanding Senior Verification Engineers to verify the design and implementation of the worlds leading SoC's and GPU's. This position offers the opportunity to have real impact in a multi- ...

  • NVIDIA

    Senior Verification Engineer

    2 weeks ago

    NVIDIA Santa Clara, United States

    Senior Verification Engineer - Tegra page is loaded · Senior Verification Engineer - Tegra · Apply · locations · US, CA, Santa Clara · time type · Full time · posted on · Posted 2 Days Ago · job requisition id · JR · We are now looking for a Senior Verification Enginee ...

  • Capgemini Engineering

    Design Verification Engineer

    1 week ago

    Capgemini Engineering Santa Clara, United States

    Job Role: Design Verification Engineer · Location: Santa Clara, California · Job description: · We are seeking a Design Verification Engineer for our full-time role with Capgemini Engineering. · Key responsibilities: · General DV skills, someone who can understand the specs, work ...

  • Ursus Inc

    Accelerator Verification Engineer

    1 week ago

    Ursus Inc Santa Clara, United States

    JOB TITLE: · Accelerator Verification Engineer · LOCATION: · (US) Santa Clara CA , Austin TX, Portland OR, Fort Collins CO · QUALIFICATIONS: · Join a cutting-edge hardware startup in Silicon Valley as a Silicon Verification Engineer. Our mission is to reimagine silicon and cre ...

  • Penn Foster Inc

    ASIC Verification Engineer

    2 weeks ago

    Penn Foster Inc Santa Clara, United States

    The NVIDIA Clocks Team is looking for an ASIC Verification engineer to validate CPU, GPU and SOC clocks design. Our team is committed to delivering high-quality clocking and reset logic to various units in SOC and GPU ASIC. The complexity of the clocks and resets has increased ma ...

  • NVIDIA

    Senior Verification Engineer

    2 weeks ago

    NVIDIA Santa Clara, United States

    We are now looking for a Senior Verification Engineer for our Tegra groupNVIDIA is seeking outstanding Senior Verification Engineers to verify the design and implementation of the world's leading SoC's and GPU's. · The full job description covers all associated skills, previous ...

  • Ampcus

    Design Verification Engineer

    1 week ago

    Ampcus Santa Clara, United States

    Role: Design Verification Engineer · Work Location: Santa Clara, CA · Background check: Mandatory · Meet and great: Mandatory · JOB DESCRIPTION: · Responsibilities: · • Architect and Create verification environments using System-Verilog and Universal verification methodolog ...

  • SiFive

    Senior Verification Engineer

    1 week ago

    SiFive Santa Clara, United States

    About SiFive · As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive's unrivaled compute platforms are co ...