- Technical lead for full chip and/or blocks level verification
- Define verification plan in co-ordination with Architects, Logic and Mixed-signal designers
- Implement testbenches, monitors and scoreboards using UVM methodology
- Achieve code coverage goals and ensure thoroughly verified designs
- Work with the Lab/System team for test plan, silicon bring up and debug
- Work in a dynamic and interdisciplinary R&D group contributing to flow and methodology development?
- Mentor junior designers
- MS EE and 10+ years or PhD EE and 7+ years experience of Verification
- Significant Experience with coding in System Verilog or Verilog and UVM methodology
- Experience in verification of DDR memory interfaces is higly desirable
- Significant Experience with standard ASIC Verification flow/software tools
- Experience working in Analog/Mixed-signal products is highly desirable
- Strong knowledge of scripting, Linux/Unix environment
- Experience in leading and driving technical solutions across organization
- The position requires good written & verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams
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Verification Engineer
1 week ago
Broadcom Corporation San Jose, United StatesPlease Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · Job duties include: Veri ...
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Verification Engineer
1 day ago
Broadcom Corporation San Jose, United StatesPlease Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · The ASIC Product Divisio ...
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Verification Engineer
1 week ago
Broadcom Corporation San Jose, United StatesPlease Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · The ASIC Product Divisio ...
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Verification Engineer
22 hours ago
Broadcom Corporation San Jose, United StatesPlease Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · Job duties include: Veri ...
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Verification Engineer
1 week ago
Broadcom Corporation San Jose, United StatesPlease Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · The ASIC Product Divisio ...
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Verification Engineer
2 weeks ago
ACL Digital Santa Clara, United StatesJob Description : We need someone familiar with UVM to run and debug tests. If they are capable, we will also ask them to write some testbench modules and components. Perhaps the most important thing is that they are diligentand good at communicating what they find and where the ...
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Verification Engineer
1 week ago
Cynet Systems Inc Santa Clara CA, United States Full time, contractJob Role Verification EngineerJob Type Contract Job Location Santa Clara CA (or) Job DescriptionVerification Engineer for Memory Controller · • Significant UVM SystemVerilog experience in complex test-benches · • Experience working with DRAM controller PHYs memory models is prefe ...
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Design Verification Engineer
1 week ago
Acceler8 Talent San Jose, United StatesDesign Verification Engineer – San Jose, CA · Acceler8 Talent is currently seeking a skilled Design Verification Engineer to join one of the world's leader in AI innovation, that specializes in the design of high-performance, low-power AI inference solutions. · You'll play a key ...
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Design Verification Engineer
1 week ago
Theery San Jose, United StatesCompany Description: We are a cutting-edge technology company specializing in the development of advanced ASIC designs for various applications. Our team is composed of innovative individuals dedicated to pushing the boundaries of what's possible in the semiconductor industry. We ...
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Design Verification Engineer
1 week ago
Intelliswift Software Inc San Jose, United StatesDesign Verification Engineer - Remote / San Jose, CA · Duration 6 months + (can be extended longer) · San Jose, CA / Remote · Design Verification Engineer · UVM · System Verilog · Test Bench Development · SystemC (preferred) · strong C/C++ · ...
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Design Verification Engineer
3 days ago
Zenex Partners San Jose, United StatesDescription · Design Verification Engineer · 12 Months contract with possibility of extension · San Jose, CA (Hybrid 3 - 4 days in office) · As a Design Verification Engineer you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory ...
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Design Verification Engineer
1 week ago
Verilab San Jose, United StatesJob Summary · We invite you to join our highly motivated team of consultants, providing clients with the very best in verification. You will be exposed to a diverse range of designs and application areas. We work on leading edge Audio, Automotive, Comms, Processors, Space, Video ...
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Design Verification Engineer
1 day ago
Zenex Partners San Jose, United StatesDescription · Design Verification Engineer · 12 Months contract with possibility of extension · San Jose, CA (Hybrid 3 - 4 days in office) · As a Design Verification Engineer you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Mem ...
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ASIC Verification Engineer
1 week ago
European Recruitment San Jose, United StatesASIC Verification Engineer- System Verilog / UVM /RTL logic Design · We are partnered up with a well-established Semiconductor organisation who enable state of the art perception for autonomous vehicles who are looking for Senior ASIC Verification Engineer to join their team in ...
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Design Verification Engineer
1 day ago
OPENEDGES Technology, Inc. San Jose, United StatesOPENEDGES develops AI Edge Computing semiconductor IPs, so that more people can enjoy AI technology closer. · Location: San Jose, CA, USA or Austin, TX, USA · Position: Design Verification Engineer · OPENEDGES is the world's only total memory system and AI platform IP solution co ...
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Design Verification Engineer
1 day ago
LeadStack Inc. San Jose, United StatesGreetings from LeadStack Hope you are doing well and staying safe We have an immediate contract position with our direct client. · If you are interested and available, please respond with your resume ASAP and suggest some times when I can call you. · Job Details: · LeadStack Inc. ...
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Design Verification Engineer
1 week ago
The Ladders San Jose, United StatesRole Description · This is a full-time, on-site role as a Design Verification Engineer SOC at Mirafra Technologies. As a Design Verification Engineer SOC, you will be responsible for tasks such as formal verification, RTL design, computer architecture, functional verification, an ...
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ASIC Verification Engineer
2 weeks ago
European Recruitment San Jose, United StatesASIC Verification Engineer- · System Verilog / UVM · We are partnered up with a well-established Semiconductor organisation who enable state of the art perception for autonomous vehicles who are looking for Senior ASIC Verification Engineer to join their team in California. · ...
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Design Verification Engineer
1 week ago
ATR International San Jose, United States OTHERJob Description: · The role is a technical, hands-on, in charge of the verification environment for new silicon projects and developments We are looking for an experienced professional with Passion & Drive to succeed. · Primary Responsibilities Include: · • Responsible for all as ...
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Design Verification Engineer
2 weeks ago
Zenex Partners San Jose, United StatesPosition Title: Design Verification Engineer (GPU Subsystems) · Department: Technical · Location: San Jose, California, United States · Position Type: Extendable contact for 12 month · Role type : W2, C2C and 1099 · Description: As a Design Verification Engineer, you will play a ...
Principal Verification Engineer - San Jose, United States - Rambus
Description
Overview:
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional?Principal Verification Engineer?to join our Memory Interconnect Design team in San Jose, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.
As a?Principal Verification Engineer, the candidate will be reporting to the Director of Design Engineering?and is a Full-Time position. Successful applicant will have highly visible role in product design across Rambus sites and take ownership of defining and executing verification plan for products.
Location:?San Jose, CA or Remote (CA, NC, GA)
Responsibilities:About Rambus
With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions speed performance, expand capacity and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.
Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.
The US salary range for this full-time position is $129,300 to $240,100. Our salary ranges are determined by role, level and location. The successful candidates starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard.
Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.
Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.
Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.
For more information about Rambus, visit For additional information on life at Rambus and our current openings, check