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    Design Verification Engineer - San Jose, United States - Theery

    Theery
    Theery San Jose, United States

    3 weeks ago

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    Description

    Company Description: We are a cutting-edge technology company specializing in the development of advanced ASIC designs for various applications. Our team is composed of innovative individuals dedicated to pushing the boundaries of what's possible in the semiconductor industry. We are currently seeking a skilled Design Verification Engineer to join our dynamic team and contribute to our exciting projects.

    Position Overview: As a Design Verification Engineer, you will play a crucial role in ensuring the functional correctness and quality of our ASIC designs. You will be responsible for developing and executing comprehensive verification strategies to validate complex digital designs. This position requires expertise in ASIC verification methodologies, including OVM (Open Verification Methodology) or UVM (Universal Verification Methodology), as well as proficiency in Verilog.

    Key Responsibilities:

    • Develop and implement verification plans based on design specifications and requirements.
    • Create advanced verification environments using OVM or UVM methodologies.
    • Write and execute test cases to thoroughly verify the functionality of digital designs.
    • Develop and maintain verification infrastructure, including test benches, test cases, and verification IP.
    • Collaborate closely with design engineers to debug issues and ensure timely resolution.
    • Analyze and report verification results to the design team and management.
    • Continuously improve verification methodologies and processes to enhance efficiency and effectiveness.

    Qualifications:

    • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field. Master's degree preferred.
    • 5+ years of proven experience in ASIC design verification, preferably in a semiconductor or technology company.
    • Strong proficiency in Verilog and SystemVerilog.
    • Experience with verification methodologies such as OVM or UVM.
    • Familiarity with industry-standard verification tools and methodologies.
    • Excellent problem-solving and debugging skills.
    • Strong communication and collaboration abilities.
    • Ability to thrive in a fast-paced, dynamic environment.

    Additional Preferred Qualifications:

    • Experience with formal verification techniques.
    • Familiarity with scripting languages such as Python or Perl.
    • Knowledge of FPGA prototyping and emulation tools.
    • Understanding of digital design principles and architectures.

    Please apply here or send your updated resume directly to

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