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    Fellow, High Performance Compute Architect - Austin, United States - NXP Semiconductors

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    Engineering / Architecture
    Description

    Job Responsibilities:

    • Drive processor architecture definition, micro-architecture analysis and definition of a super-scalar, out-of-order RISC-V core. Work in conjunction with the Systems Architects, Performance Modelling, and working with the cross function teams both on Design, Verification, Validation and supporting SW/FW teams.
    • Drive compliance testing and assuring quality, meeting KPI's and target power & performance.
    • Drive high performance compute processor development from Micro-Architecture and oversees execution of the design and implementation working with regional functional managers.
    • Hands on involvement in IP & compute domain subsystem digital design/Integration.
    • Translate Micro-Architecture specification to Implementation specification.
    • Actively drive in technical challenges discussion and decision making within compute domain scope.
    • Delivery of processor with first time right quality meeting project schedule
    • Responsible for identifying candidates (internal & external) in the immediate short term with strong backgrounds to lead the architecture, performance modelling, logic design and verification.
    • Raise the bar in terms of power and performance KPIs. Works across the BLs (marketing & software) and SOC architecture to ensure PPA targets are identified and achieved throughout the program.
    • Coach the team to ensure the next level of technical leaders and managers
    • Will be the technical driver for high performance compute across the entire company; participates in Business roadmap / strategy.
    • Influences technical strategy to drive innovation, e.g., products, technology and/or patents) that consistently contributes to significant revenue and profit. Enables new business opportunities.
    • Accountable for the creation of current or future value through research, development, profitability / cost improvement, and/or capital avoidance that influences the Business group.

    Job Requirements:

    • BSEE required, MSEE preferred with 20+ years of industry related experience
    • Ability to lead and motivate technical teams to develop industry-leading IP using cutting-edge methodologies
    • Earlier experience with SoC Processor based architectures needed. ARM/RISC-V experience would be added advantage
    • Self-driven and capable for independent work and independent decision making.
    • Exposure to Low-power design, System Security considered as added advantage
    • Hands on front-end design of complex multi clock domain blocks
    • Fluency in design & verification languages such as VHDL, Verilog, C and System Verilog.
    • Experience in Spyglass for lint and CDC checks.
    • Experience in using synthesis and LEC flow.
    • Knowledge on Verification Methodologies to actively participate in Debug Analysis
    • Develop new IP and enhance existing IP and sub-systems.
    • Develop both foundation IP and differentiating/market-oriented IP and maintain forward looking roadmaps
    • Be recognized as an industry wide thought leader and technical authority with advanced knowledge of theories and concepts to evaluate and integrate critical information from different functions to inform the development of strategy and commercial objectives


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