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    Lead Mixed-Signal ASIC Engineer - Santa Clara, United States - Anello Photonics

    Anello Photonics
    Anello Photonics Santa Clara, United States

    4 weeks ago

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    Description
    About Anello Photonics:

    ANELLO Photonics is a leading-edge technology company based in Santa Clara, CA. The company has developed integrated photonic system-on-chip technology for next generation navigation. ANELLO's SIPHOGTM gyroscope is based on its patented photonic integrated circuit technology. The result is a product that is higher performance, much smaller size and weight, at a fraction of the cost of traditional gyros used in industrial, aerospace and military applications. It enables reliable and accurate navigation and positioning across many autonomous applications. Anello is currently engaged in commercial trials with various market-leading customers in the Construction, Farming, Trucking, Unmanned Aerial Vehicles, Autonomous Vehicles, and National Security segments.

    Job Summary:

    Inertial Measurement Units are a fundamental part of modern consumer, automotive, and industrial electronics. ANELLO is developing a next generation IMU sensor technology based on silicon photonics.

    The Lead Mixed Signal ASIC Engineer will enhance and prepare ANELLO's current generation of discrete analog lock-in, power control and signal conditioning electronics for an ASIC-based implementation.

    Responsibilities:
    • Architecture definition, custom analog circuit design, analog layout, and RTL design
    • Develop process optimized Transimpedance Amplifier Designs
    • Develop analog/RF front-end, mixer and demodulator stages
    • Develop custom power supply circuits for dual independent PID controlled current sources
    • Develop or integrate high-resolution high-speed, high-resolution Analog-to-Digital converter and Digital-to-Analog converter blocks
    • Develop test and verification boards pre-chip tapeout, verify design/architecture both in the lab with bench and with in-system field testing
    • Digital Simulation, Verilog/VHDL, RTL validation
    • Analog Simulation with HSPICE, PSPICE, and HFSS
    • Manage chip tape out process and work closely with third-party design house
    • Attention to noise and electrical drift budget including over-temperature and aging effects
    Requirements:
    • MSEE Degree or other Advanced Electrical Engineer Degree
    • 10+ years emphasis on Analog, Mixed Signal ASIC Design
    • Results oriented w/track record of delivering working product at product-oriented companies.
    • Expertise in low-noise switching regulator design
    • Expertise in high-resolution Analog-to-Digital converter and Digital-to-Analog converter designs
    • Expertise in micro-controller core integration - preferably ARM. SPI, UART, and GPIO interfaces
    • Excellent communications skills (verbal and written)
    For more information: please visit

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