DFT Engineer - Santa Clara, United States - QData

DFT Engineer

2 weeks ago

DFT Engineer · Job Summary: Talent Software Services is in search of a DFT Engineer for a contract position in Santa Clara, CA. The opportunity will be eight months with a strong chance for a long-term extension. · Primary Responsibilities/Accountabilities:Stitching multiple sc ...

DFT Engineer

3 weeks ago

Are you an experienced DFT Engineer with a desire to excel? If so, then Talent Software Services may have the job for you Our client is seeking an experienced DFT Engineer to work at their company in Santa Clara, CA. · Primary Responsibilities/Accountabilities: · Stitching mult ...

DFT Engineer

3 weeks ago

Are you an experienced DFT Engineer with a desire to excel? If so, then Talent Software Services may have the job for you Our client is seeking an experienced DFT Engineer to work at their company in Santa Clara, CA. · Do you have the following skills, experience and drive to su ...

DFT Engineer

2 weeks ago

Role : DFT Engineer · Location: Santa Clara (US:95054), CA · Qualification/Experience/Skills Required · • 10+ years of hands-on experience with DFT and test flow with commercial EDA tools (Synopsys, Mentor) for large and complex SoCs. · • Strong fundamental knowledge of DFT techn ...

DFT Engineer

3 weeks ago

Must Have skills: · Strong DFT background (such as Analog DFT, MBIST, IEEE1687 and others) · Tessent MBIST insertion, tessent MBIST pattern generation and simulation using Tessent flow. · Memory BIST insertion and verification experience (SRAM, CAM, eDRAM) · Detailed Job Desc ...

DFT Engineer

3 weeks ago

Position: DFT Engineer · Location: San Jose, CA / Austin, TX · Required Skills: · 5+ years of experience of working in DFT. · Running MBIST simulations, including gate-level with timing corners and debugging. · Assist MBIST/DFT leads and Interact with RTL counterparts to res ...

DFT Engineer

3 weeks ago

Job Title: DFT Engineer · Location: Hybrid in San Jose, CA · Duration: 6+ months contract · Payrate- $90-95/hr on W2 · Job Responsibilities: · Use industry standard tools to implement scan in complex IP, and generate high coverage ATPG patterns utilizing scan compression and veri ...

DFT Engineer

3 weeks ago

DFT Engineer · Location: Bay Area · Qualification: · 8+ years of industry experience required · Skill Set: BS or above in electrical engineering or computer engineering Experience with Hierarchical DFT Architecture · Experience in Scan Insertion, test Muxing, ATPG, MBist & ...

DFT Engineer

1 day ago

Position: DFT Engineer · Location: San Jose, CA · Required Skills: · 5+ years of experience of working in DFT. · Understanding basics of DFT structures, MBIST, Boundary Scan Tap Controller · Hands on experience with industry standard ATPG tools, MBIST, simulation and debugging. · ...

DFT Verification Engineer

2 weeks ago

JOB TITLE: DFT Verification Engineer · **TOP 3 SKILLS:** DFT/Mbist, Scan Insertion, Design Verification · LOCATION: Santa Clara, CA or Austin, TX · DURATION: Direct · RATE RANGE: $160,000 - $200,000 · SUMMARY: · Rivos supports the intense requirements of the large language mode ...

DFT Verification Engineer

2 weeks ago

JOB TITLE: DFT Verification Engineer · **TOP 3 SKILLS:** DFT/Mbist, Scan Insertion, Design Verification · LOCATION: Santa Clara, CA or Austin, TX · DURATION: Direct · RATE RANGE: $160,000 - $200,000 · SUMMARY: · Rivos supports the intense requirements of the large language ...

DFT Verification Engineer

3 weeks ago

JOB TITLE: DFT Verification Engineer · **TOP 3 SKILLS:** DFT/Mbist, Scan Insertion, Design Verification · LOCATION: Santa Clara, CA or Austin, TX · DURATION: Direct · RATE RANGE: $160,000 - $200,000 · SUMMARY: · Rivos supports the intense requirements of the large languag ...

Sr. DFT Engineer

3 weeks ago

Job Description · Ambarella, a worldwide leader in edge AI semiconductors and software, is on a mission to bring artificial intelligence to all types of everyday devices, for enhanced environmental perception in everything from security cameras to robots to autonomous vehicles. ...

DFT Engineer Intern

15 hours ago

Job Description · Position Responsibilities: Logic Design to support DFT features · Automate DFT Flows (Scan, Compression & MBIST) used for complex multi-million gate SoC · Verification of DFT Logic and analysis of fault coverage · Timing analysis for DFT Modes · Minimum Requir ...

Sr. DFT Engineer

6 days ago

Ambarella, a worldwide leader in edge AI semiconductors and software, is on a mission to bring artificial intelligence to all types of everyday devices, for enhanced environmental perception in everything from security cameras to robots to autonomous vehicles. · Position Responsi ...

Senior DFT Engineer

2 days ago

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of ...

DFT Engineer

2 weeks ago

Job Description: · Our Client is seeking a DFT Engineer for the R&D team based out of our Milpitas, CA Office This position is a hands-on technical position, working closely with the customer, design, and implementation teams Primary Responsibilities: · Support and work closely ...

Senior DFT Engineer

3 weeks ago

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI the next era of c ...

Senior DFT Engineer

3 weeks ago

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of ...

DFT Engineer Intern

3 weeks ago

Position Responsibilities: · Logic Design to support DFT features · Automate DFT Flows (Scan, Compression & MBIST) used for complex multi-million gate SoC · Verification of DFT Logic and analysis of fault coverage · Timing analysis for DFT Modes · Minimum Requirements: · MSEE in ...