- 5+ years in physical design with hands on synthesis and APR expertise using DC/Genus/ICC/FC/Innovus.
- 3+ years of experience in floor planning, global timing verification and PD flows
- 3+ years of experience integrating IP from both internal and external vendors and to specify IP requirements in the physical domain Exposure to and/or experience with industry simulation and design tools.
- 3+ years of experience in hierarchical design approach, top-down design, budgeting, timing and physical convergence.
- 5+ years in physical design with hands on synthesis and APR expertise using DC/Genus/ICC/FC/Innovus.
- 3+ years of experience in floor planning, global timing verification and PD flows
- 3+ years of experience integrating IP from both internal and external vendors and to specify IP requirements in the physical domain Exposure to and/or experience with industry simulation and design tools.
- 3+ years of experience in hierarchical design approach, top-down design, budgeting, timing and physical convergence.
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Product Engineer/Design Engineer - Santa Clara, CA, United States - Intel Corporation
Description
Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. Join us, because at Intel, we are building a better tomorrow.Intel NEX Cloud Connectivity (NCCG) team delivers best-in-class Ethernet products and is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing-devices.
NCCG's compelling Ethernet products move the world's data and are the foundations of cloud service and telecommunications data centers.We are a team of problem solvers, experimenters, and innovators who are dedicated to designing the network technologies that currently lead and continue to transform datacenter ecosystems.
As a world-class organization, we're looking for outstanding talent to accelerate our growth during an exciting time in Ethernet networking marketing technology.
As a Physical Design Engineer in NEX, you will:Perform physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
Conduct all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
Conduct verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools.
Optimize design to improve product level parameters such as power, frequency, and area.Participate in the development and improvement of physical design methodologies and flow automation.
The Physical Design Engineer should possess the following attributes in addition to the qualifications listed below.
Willingness to mentor team members and lead projects.
Willingness to work with a global team that will require evening and off-hours engagement with customers and stakeholders.
Bachelor's degree in Electrical Engineering, Computer Engineering or related field and 4+ years of experience OR a Masters degree in Electrical Engineering, Computer Engineering or related field and 3+ years of experience
Bachelor's degree in Electrical Engineering, Computer Engineering or related field and 9+ years of experience OR a Masters degree in Electrical Engineering, Computer Engineering or related field and 7+ years of experience.
Beyond health, dental, and retirement benefits, Intel's benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment.
Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program.
Join us, because at Intel, we are building a better tomorrow. Diversity at IntelIntel NEX Cloud Connectivity (NCCG) team delivers best-in-class Ethernet products and is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing-devices.
NCCG's compelling Ethernet products move the world's data and are the foundations of cloud service and telecommunications data centers.We are a team of problem solvers, experimenters, and innovators who are dedicated to designing the network technologies that currently lead and continue to transform datacenter ecosystems.
As a world-class organization, we're looking for outstanding talent to accelerate our growth during an exciting time in Ethernet networking marketing technology.
As a Physical Design Engineer in NEX, you will:Perform physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
Conduct all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
Conduct verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools.
Optimize design to improve product level parameters such as power, frequency, and area.Participate in the development and improvement of physical design methodologies and flow automation.
The Physical Design Engineer should possess the following attributes in addition to the qualifications listed below.
Willingness to mentor team members and lead projects.
Willingness to work with a global team that will require evening and off-hours engagement with customers and stakeholders.
Bachelor's degree in Electrical Engineering, Computer Engineering or related field and 4+ years of experience OR a Masters degree in Electrical Engineering, Computer Engineering or related field and 3+ years of experience
Bachelor's degree in Electrical Engineering, Computer Engineering or related field and 9+ years of experience OR a Masters degree in Electrical Engineering, Computer Engineering or related field and 7+ years of experience.
Beyond health, dental, and retirement benefits, Intel's benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment.
Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program.
Experienced Hire Shift:
Shift 1 (United States of America)
Primary Location:
The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership.
It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.