- Perform physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
- Conduct all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
- Conduct verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
- Analyze results and makes recommendations to fix violations for current and future product architecture. Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools.
- Optimize design to improve product level parameters such as power, frequency, and area.
- Participate in the development and improvement of physical design methodologies and flow automation.
- Willingness to mentor team members and lead projects.
- Willingness to work with a global team that will require evening and off-hours engagement with customers and stakeholders.
- Should be a self-starter, able to drive tasks to closure.
- The candidate should have strong communication, problem-solving, and analytical skills.
- Perform physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
- Conduct all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
- Conduct verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
- Analyze results and makes recommendations to fix violations for current and future product architecture. Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools.
- Optimize design to improve product level parameters such as power, frequency, and area.
- Participate in the development and improvement of physical design methodologies and flow automation.
- Willingness to mentor team members and lead projects.
- Willingness to work with a global team that will require evening and off-hours engagement with customers and stakeholders.
- Should be a self-starter, able to drive tasks to closure.
- The candidate should have strong communication, problem-solving, and analytical skills.
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Mechanical Design Engineer 4
Found in: Zoho Direct Apply - 1 day ago
Dawar Consulting, Inc. Milpitas, United StatesOur client, a world leader in the semiconductor industry, is looking for a "Mechanical Design Engineer 4". · Job Title: Mechanical Design Engineer 4 · Shift Hours: 9 AM- 5 PM · Job Duration: Long-term Contract on W2 (Onsite) · Location: Milpitas, CA · Company Benefits: · Health ...
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Design Engineer/Senior Design Engineer
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NVIDIA Corporation Santa Clara, CA, United StatesSenior ASIC Design Engineer page is loaded Senior ASIC Design Engineer · Apply locations US, CA, Santa Clara time type Full time posted on Posted 5 Days Ago job requisition id JR NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's lea ...
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Design Engineer/Senior Design Engineer
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CYNET SYSTEMS Santa Clara, CA, United StatesJob Description: · Pay Range $50.64hr - $75.92hr · Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff. · Drive the effort to maintain RTL quality metrics in complex, hierarchical designs and automatin ...
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Design Engineer/Senior Design Engineer
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InnoPhase IoT San Jose, CA, United StatesJob Description: · Join Innophase IoT as a Senior ASIC Design Engineer and be contribute to the development ofLow-power WiFi, BT/BLE RTL design, and implementation. You will be involved in the design · development cycle, which includes participating in high-level product specific ...
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Found in: Jooble US O C2 - 2 days ago
Intel Corporation Santa Clara, CA, United StatesIntel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. Join us, because at Intel, we are building a better tomorrow. Intel NEX Cloud ...
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Found in: Appcast US C2 - 2 days ago
P. Chappel Associates, Inc. Santa Clara, United States· Front-End ASIC Lead Design Engineer - Santa Clara, CA · Unique opportunity to join an established international company in their US expansion. Working from the US headquarters, you will have the ability to be an impact player working with other exceptionally talented people. T ...
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Design Engineer
Found in: Lensa US 4 C2 - 5 days ago
Innogrit San Jose, United StatesJob Description · Job Description Salary: DOE · Job description · Contribute to micro-architecture designs for state-of-the-art high-speed low-power digital IPs. · Implement design modules using hardware description language (HDL). · Design schemes for multi-clock domain crossin ...
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Design Verification Engineer
Found in: Appcast US C2 - 1 day ago
Mirafra Technologies Santa Clara, United StatesLooking to add DV Engineers in Irvine, San Diego and Santa Clara. · On going needs additional 10 engineers in team. · Position detail: SOC verification · Experience level : 5-20 years · Architect block and full-chip verification environments using HVLs and constrained random · te ...
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SoC Design Engineer
Found in: Lensa US 4 C2 - 5 days ago
Omni Vision Inc Santa Clara, United States· Be responsible for digital design of image sensor, SoC integration and IP design, analysis, integration, and validation. Work closely with back-end team in floor-planning, timing closure and DFT. Conduct image sensor array/analog related timing control design and STA. Perform ...
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Circuit Design Engineer
Found in: Lensa US 4 C2 - 5 days ago
LanceSoft Santa Clara, United StatesLocation: Folsom or Santa Clara or San Diego, CA. · Hybrid. 2-3 days onsite. · PLL Circuit Design Engineer · Key Responsibilities: · Help design of building blocks of a PLL · Run pre-tapeout verification flows to confirm design meets performance, power, reliability and timin ...
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Mechanical Design Engineer
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Celestial Services Santa Clara, United StatesJob Description: · Celestial AI, a trailblazer in cutting-edge technology at the intersection of photonics, packaging, and advanced manufacturing, is actively seeking a seasoned Mechanical Engineer to join our innovative team. As a pivotal member of Celestial AI, you will play a ...
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Design Quality Engineer
Found in: Lensa US 4 C2 - 3 days ago
Kelly Services, Inc. Santa Clara, United StatesReports. Test method validation, test fixture design review/qualification. Review regression analysis and ensure that impacts are clearly justified. Support Installation qualification of non-product software, test equipment. Support risk management a Quality Engineer, Design, Eng ...
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Circuit Design Engineer
Found in: Lensa US 4 C2 - 5 days ago
LanceSoft Santa Clara, United StatesLocation: Folsom or Santa Clara or San Diego, CA. · Hybrid. 2-3 days onsite. · PLL Circuit Design Engineer · Key Responsibilities: · Help design of building blocks of a PLL · Run pre-tapeout verification flows to confirm design meets performance, power, reliability and timin ...
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Mechanical Design Engineer
Found in: Lensa US 4 C2 - 5 days ago
Q-Cells Santa Clara, United StatesHanwha Q CELLS Co., Ltd., is one of the world's largest and most recognized photovoltaic manufacturers for its high-performance, high-quality solar cells and modules. It is headquartered in Seoul, South Korea (Global Executive HQ) and Talheim, Germany (Technology & Innovation HQ) ...
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Design Engineer
Found in: ZipRecruiter Test10S US C2 - 17 hours ago
Innogrit San Jose, United StatesJob Description · Job DescriptionSalary: DOE · Job description · Contribute to micro-architecture designs for state-of-the-art high-speed low-power digital IPs. · Implement design modules using hardware description language (HDL). · Design schemes for multi-clock domain crossing ...
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RTL Design Engineer
Found in: Lensa US 4 C2 - 5 days ago
LanceSoft Santa Clara, United StatesLocation: Onsite San Jose, CA · JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for lint ...
Physical Design Engineer - Santa Clara, CA, United States - Intel Corporation
Description
Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below
Intel NEX Cloud Connectivity (NCCG) team delivers best-in-class Ethernet products and is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing-devices. NCCG's compelling Ethernet products move the world's data and are the foundations of cloud service and telecommunications data centers.
We are a team of problem solvers, experimenters, and innovators who are dedicated to designing the network technologies that currently lead and continue to transform datacenter ecosystems. As a world-class organization, we're looking for outstanding talent to accelerate our growth during an exciting time in Ethernet networking marketing technology. If you're ready to be a part of this journey, then we want to hear from you.
As a Physical Design Engineer in NEX, you will:
The Physical Design Engineer should possess the following attributes in addition to the qualifications listed below.
Qualifications:
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
What we need to see (Minimum Qualifications):
· Bachelor's degree in Electrical Engineering, Computer Engineering or related field and 4+ years of experience OR a Masters degree in Electrical Engineering, Computer Engineering or related field and 3+ years of experience
· 5+ years in physical design with hands on synthesis and APR expertise using DC/Genus/ICC/FC/Innovus.
· 3+ years of experience in floor planning, global timing verification and PD flows
How to Stand out (Preferred Qualifications):
· Bachelor's degree in Electrical Engineering, Computer Engineering or related field and 9+ years of experience OR a Masters degree in Electrical Engineering, Computer Engineering or related field and 7+ years of experience.
· 3+ years of experience integrating IP from both internal and external vendors and to specify IP requirements in the physical domain Exposure to and/or experience with industry simulation and design tools.
· 3+ years of experience in hierarchical design approach, top-down design, budgeting, timing and physical convergence.
Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel's benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here :
Job Type:
Experienced HireJob Details: Job Description:
Do Something Wonderful
Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below
· Life at Intel
· Diversity at Intel
Intel NEX Cloud Connectivity (NCCG) team delivers best-in-class Ethernet products and is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing-devices. NCCG's compelling Ethernet products move the world's data and are the foundations of cloud service and telecommunications data centers.
We are a team of problem solvers, experimenters, and innovators who are dedicated to designing the network technologies that currently lead and continue to transform datacenter ecosystems. As a world-class organization, we're looking for outstanding talent to accelerate our growth during an exciting time in Ethernet networking marketing technology. If you're ready to be a part of this journey, then we want to hear from you.
As a Physical Design Engineer in NEX, you will:
The Physical Design Engineer should possess the following attributes in addition to the qualifications listed below.
Qualifications:
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
What we need to see (Minimum Qualifications):
· Bachelor's degree in Electrical Engineering, Computer Engineering or related field and 4+ years of experience OR a Masters degree in Electrical Engineering, Computer Engineering or related field and 3+ years of experience
· 5+ years in physical design with hands on synthesis and APR expertise using DC/Genus/ICC/FC/Innovus.
· 3+ years of experience in floor planning, global timing verification and PD flows
How to Stand out (Preferred Qualifications):
· Bachelor's degree in Electrical Engineering, Computer Engineering or related field and 9+ years of experience OR a Masters degree in Electrical Engineering, Computer Engineering or related field and 7+ years of experience.
· 3+ years of experience integrating IP from both internal and external vendors and to specify IP requirements in the physical domain Exposure to and/or experience with industry simulation and design tools.
· 3+ years of experience in hierarchical design approach, top-down design, budgeting, timing and physical convergence.
Amazing Benefits
Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel's benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here :
Job Type:
Experienced HireShift:
Shift 1 (United States of America)Primary Location:
US, California, Santa ClaraAdditional Locations: Business group:
The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust
N/ABenefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in
US, California:$144,501.00-$217,311.00S al ary range dependent on a number of factors including location and experience.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. #J-18808-Ljbffr