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    Design Verification Engineer - San Diego, United States - QuEST Global

    QuEST Global
    QuEST Global San Diego, United States

    3 weeks ago

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    Description

    Dear Candidate

    Quest Global is looking for a Design Verification Candidate , If interested please share your updated resume at sanghamitra.-

    Below is the details shared :

    Skill - DV

    Location - San Diego and Irvine

    Experience - 10+ years

    Job Description

    • Experience in verifying designs at system level and IP or block level.
    • Fluent knowledge of RTL verification methodologies including System Verilog.
    • Strong experience in ASIC design verification flows and DV methodologies
    • Strong working knowledge of object oriented verification languages (OVM, UVM, etc.), C/C++, Perl, Python and scripting skills.
    • Demonstrated ability to plan & build complex, reusable, scalable test benches
    • Strong and independent design debugging capability with black box and white box approaches. Working knowledge of industry debug tools.
    • Strong verbal and written communication skills. Must be comfortable working in a team environment with verification team and design team members.
    • Demonstrated ability to analyze, resolve complex verification trade-off scenarios and work in dynamic environment with changing requirements.
    • Must have legal authorization to work in the US

    The candidate should have expertise in some (or preferably all) of the following areas:

    • Experience with hardware design and debug, C++/SystemC/Python and other programming languages & development processes using Synchronicity/GIT are a strong plus.
    • Experience working with Emulators and FPGA based prototyping a plus.
    • Familiarity with overall chip design methodologies and tools
    • Knowledge of CPU, DDR, Bus Protocol (AHB/AXI/CXS), Network Protocol or DSP design preferred
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