-
Design Verification Engineer
1 week ago
SambaNova Systems Stanford, United StatesThe era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale. · SambaNova Suite ...
-
Engineer, Design Verification Engineering
1 week ago
VMware, Inc. Palo Alto, CA, United StatesDesign Verification Engineer CPU & Server Platform** · Software Engineering · * We are CPU & Server Platform team responsible for ESXi operating system and core virtualization infrastructure. In this role you will be part of Hardware team creating next generation HW accelerators ...
-
NovaTech Solutions West Menlo Park, United StatesSenior Verification Engineer · We are currently seeking a passionate Senior Verification Engineer to join our team in West Menlo Park. Our goal is to co-create a new category of super servers and make a significant impact in the AI and datacenter industry. · Our innovative soluti ...
-
Design Verification Engineer CPU
1 week ago
VMware Stanford, United States**Design Verification Engineer CPU & Server Platform** · CAROUSEL_PARAGRAPH · No · Palo Alto, California · Software Engineering · R · ** Share Job** · mail_outlineGet future jobs matching this search · or ** Job Description** · **Business overview:** · We are CPU & Serv ...
-
Senior Software Verification Engineer
4 days ago
Digital Prospectors Palo Alto, United StatesPosition: Senior Software Verification Engineer · Location: Palo Alto, CA (Hybrid – 3 days onsite) · Length: 12+ months · Job Description: · Our client is seeking an exceptionally skilled Senior Software Verification Engineer lead with experience leading verification testing in a ...
-
Senior Software Verification Engineer
1 week ago
Digital Prospectors Palo Alto, United StatesSenior Software Verification Engineer · Palo Alto, CA · Job Type: Contract · Recruiter: Jaime Gunning ) · Phone: · Position: Senior Software Verification Engineer · Location: Palo Alto, CA (Hybrid – 3 days onsite) · Length: 12+ months · Job Description: · Our client is seeking a ...
-
Senior Software Verification Engineer
4 days ago
Digital Prospectors Palo Alto, United StatesSenior Software Verification Engineer · Palo Alto, CA · Job Type: Contract · Recruiter: Jaime Gunning ) · Phone: · Position: Senior Software Verification Engineer · Location: Palo Alto, CA (Hybrid – 3 days onsite) · Length: 12+ months · Job Description: · Our client is seeking a ...
-
Senior Software Verification Engineer
3 days ago
Digital Prospectors Palo Alto, United StatesPosition: Senior Software Verification Engineer · Location: Palo Alto, CA (Hybrid – 3 days onsite) · Length: 12+ months · Make sure to read the full description below, and please apply immediately if you are confident you meet all the requirements. · Job Description: · Our c ...
-
Senior Software Verification Engineer
1 week ago
Digital Prospectors Palo Alto, United States**Senior Software Verification Engineer** · **Palo Alto, CA** · **Job Type:** Contract · **Recruiter:** Jaime Gunning (om/our-team/jaime-gunning) · **Phone:** · **Position:** Senior Software Verification Engineer · **Location:** Palo Alto, CA (Hybrid – 3 days onsite) · **Length: ...
-
Senior Software Verification Engineer
1 week ago
Digital Prospectors Palo Alto, United StatesPosition: Senior Software Verification Engineer · Location: Palo Alto, CA (Hybrid 3 days onsite) · Length: 12+ months · Job Description: · Our client is seeking an exceptionally skilled Senior Software Verification Engineer lead with experience leading verification testing in ...
-
Senior Design Verification Engineer
5 days ago
SambaNova Systems Palo Alto, United StatesThe third era of AI has arrived, powered by Generative AI. Generative AI is achieving step-function increases in scale, versatility, and accuracy compared to legacy AI technologies, presenting an opportunity for organizations to fundamentally transform their business and operatio ...
-
Verification Engineer
1 week ago
Synopsys Sunnyvale, United StatesOur Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world's broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabiliti ...
-
Design Verification Engineer CPU
1 week ago
VMware, Inc. Palo Alto, CA, United States**Design Verification Engineer CPU & Server Platform** · CAROUSEL_PARAGRAPH · No · Palo Alto, California · Software Engineering · R · ** Share Job** · mail_outlineGet future jobs matching this search · or ** Job Description** · **Business overview:** · We are CPU & Server P ...
-
IP Verification Engineer
1 week ago
Triple Crown Services Mountain View, United StatesTriple Crown is a leading provider of hardware, embedded, software, and mechanical engineering talent. Businesses and technology teams, from Fortune 500 enterprises to emerging startups, rely on our ability to rapidly place the developers, architects, coders, and designers who en ...
-
ASIC Engineer, Design Verification
1 week ago
META Menlo Park, United StatesSummary: · Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will ...
-
Design Verification Engineer
1 week ago
QuEST Global Mountain View, United StatesDesign Verification Engineer · San Jose CA · JOB DESCRIPTION · Knowledge of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc. · ? Strong HVL (UVM or SystemVerilog with OVM), C/C++, Perl, TCL programming skills. ...
-
IP Verification Engineer
4 hours ago
Triple Crown Services Mountain View, United StatesTriple Crown is a leading provider of hardware, embedded, software, and mechanical engineering talent. Businesses and technology teams, from Fortune 500 enterprises to emerging startups, rely on our ability to rapidly place the developers, architects, coders, and designers who en ...
-
Silicon Verification Engineer
5 days ago
BrickRed Systems Mountain View, United StatesWe are seeking a highly skilled Silicon Verification Engineer to join our team. The ideal candidate will be responsible for writing Silicon verification tests, running and debugging tests, and ensuring the overall quality and functionality of our silicon designs. This role requir ...
-
Silicon Verification Engineer
1 day ago
BrickRed Systems Mountain View, United StatesWe are seeking a highly skilled Silicon Verification Engineer to join our team. The ideal candidate will be responsible for writing Silicon verification tests, running and debugging tests, and ensuring the overall quality and functionality of our silicon designs. This role requir ...
-
CPU Verification Engineer
2 weeks ago
BrickRed Systems Mountain View, United StatesWe are seeking a highly skilled Silicon Verification Engineer to join our team. The ideal candidate will be responsible for writing Silicon verification tests, running and debugging tests, and ensuring the overall quality and functionality of our silicon designs. This role requir ...
Senior/Staff SOC Design Verification Engineer - Stanford, United States - Tesla
Description
**Senior/Staff SOC Design Verification Engineer - Autopilot AI (Dojo)**
????Engineering & Information Technology????Palo Alto, California?? ID89242???? Tesla's Autopilot AI (Dojo) Silicon Development Team is looking for a Design Verification Engineer to develop and manage the verification and test environments. We are looking for incredible Engineers to work on state-of-the-art chip designs, where your limit is only your imagination. You will work with a team of highly talented engineers, who are focused on advancing Teslas AI mission. If you love solving challenging problems, you will fit in very well with our culture
**Here's what you will do:**
Define and review verification and validation testplans at both the unit level and SOC level.
Review and aid in developing the RTL design architecture and specification.
Verify design functionality through writing reusable and scalable testbenches, scoreboards, assertions, and assembly tests.
Execute coverage of various use cases, then feeding back to the testplans for closure.
Integrate different IPs onto the SOC testbenches, then perform fullchip/cluster/integration level testing.
Integrate and work with VIPs to stress-test our IPs for various protocols.
Develop and maintain regressions, tools, infrastructure, and methodology.
Functional bringup and debug on various platforms and tools.
Run real world software use cases on emulation and FPGA. Measure performance and feedback to designers.
Post-silicon validation bringup and production ramp.
**Minimum requirements:**
BS or MS in computer science, computer engineering, or electrical engineering.
5+ years of work experience in designing, verifying, and validating complex hardware systems.
Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, and Python.
Proficient in debugging SOC, CPU, GPU, fabric, NOC, memory, various protocols like PCIE or Ethernet, or other complex ASIC designs.
Knowledge of advanced computer architecture and micro-architecture concepts.
Experience with writing directed and random test cases.
Experience with design verification and validation methodologies and strategies.
Experience with power and performance modeling concepts.
Good communication skills, and a team player.
Able to work independently in a fast-paced team and environment.
**Desirable experiences:**
Deep knowledge of system architecture including CPU, GPU, fabrics, interconnects, NOC, memory sub-systems, I/O peripherals (UART/SPI), bus protocols (AXI/APB), PCIE, Ethernet, DMA, CSRs, etc.
Experience with hardware-software interaction, and software application testing on the chip.
Experience with system coherency verification.
Experience with boot, reset, clock, and power management verification.
Experience with integrating IPs onto the chip. Prior work experience with vendors is a plus.
Emulation/FPGA experience is a plus.
Post-silicon bringup and validation experience is a plus.
**?????**
Tesla ?????????????????????????????????????????????????????????????????????????????
Tesla ?????????????????????????????????????????????????????????????????????
????????????????????????????????????????????????????????????????????????????????????????????
Tesla ?????????????????????????????????????????????????????????????????????????????????????????????????????????????????
**Senior/Staff SOC Design Verification Engineer - Autopilot AI (Dojo)**
???? Engineering & Information Technology ???? Palo Alto, California ?? ID 89242 ???? Full-time Tesla's Autopilot AI (Dojo) Silicon Development Team is looking for a Design Verification Engineer to develop and manage the verification and test environments. We are looking for incredible Engineers to work on state-of-the-art chip designs, where your limit is only your imagination. You will work with a team of highly talented engineers, who are focused on advancing Teslas AI mission. If you love solving challenging problems, you will fit in very well with our culture
**Here's what you will do:**
Define and review verification and validation testplans at both the unit level and SOC level.
Review and aid in developing the RTL design architecture and specification.
Verify design functionality through writing reusable and scalable testbenches, scoreboards, assertions, and assembly tests.
Execute coverage of various use cases, then feeding back to the testplans for closure.
Integrate different IPs onto the SOC testbenches, then perform fullchip/cluster/integration level testing.
Integrate and work with VIPs to stress-test our IPs for various protocols.
Develop and maintain regressions, tools, infrastructure, and methodology.
Functional bringup and debug on various platforms and tools.
Run real world software use cases on emulation and FPGA. Measure performance and feedback to designers.
Post-silicon validation bringup and production ramp.
**Minimum requirements:**
BS or MS in computer science, computer engineering, or electrical engineering.
5+ years of work experience in designing, verifying, and validating complex hardware systems.
Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, and Python.
Proficient in debugging SOC, CPU, GPU, fabric, NOC, memory, various protocols like PCIE or Ethernet, or other complex ASIC designs.
Knowledge of advanced computer architecture and micro-architecture concepts.
Experience with writing directed and random test cases.
Experience with design verification and validation methodologies and strategies.
Experience with power and performance modeling concepts.
Good communication skills, and a team player.
Able to work independently in a fast-paced team and environment.
**Desirable experiences:**
Deep knowledge of system architecture including CPU, GPU, fabrics, interconnects, NOC, memory sub-systems, I/O peripherals (UART/SPI), bus protocols (AXI/APB), PCIE, Ethernet, DMA, CSRs, etc.
Experience with hardware-software interaction, and software application testing on the chip.
Experience with system coherency verification.
Experience with boot, reset, clock, and power management verification.
Experience with integrating IPs onto the chip. Prior work experience with vendors is a plus.
Emulation/FPGA experience is a plus.
Post-silicon bringup and validation experience is a plus.