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Senior Design Verification Engineer - Palo Alto, United States - SambaNova Systems
Description
The third era of AI has arrived, powered by Generative AI.Generative AI is achieving step-function increases in scale, versatility, and accuracy compared to legacy AI technologies, presenting an opportunity for organizations to fundamentally transform their business and operations.
SambaNova Suite is enabling organizations and enterprises to achieve the transformative promise of these new AI technologies with a fully integrated hardware-software system that delivers innovation across the full AI stack, including the most accurate generative AI models, optimized for enterprise and government.
This creates the AI backbone for the next 10 years and beyond.Working at SambaNova
This role presents a unique opportunity to shape the future of AI and the value it can unlock across every aspect of an organization's business and operations.
We are looking for talented and motivated engineers to help us solve some of the most challenging problems in machine learning, artificial intelligence, and data analytics.
As a
Senior Design Verification Engineer - IO Subsystem , you'll be responsible for verifying the design, architecture, and micro-architecture using advanced verification methodologies.
Develop and maintain IO subsystem test-bench components, test cases, and scripts for design verification at the block, full chip, system, and gate-level benches
Develop test plan, schedule, and methodology for functional, performance, and post-silicon verification
Participate in mapping and coding ML and AL application flows for verification and compiler development
Participate in design verification reviews, maintain regressions, and drive failure root-cause
Collaborate with design, architecture, and software teams to innovate and solve problems
Enhance DV methodologies and processes to improve execution effectiveness and efficiency
Mentor/lead junior engineers
Basic Qualifications
MS or BS degree in EE, CS or CE
3+ years of industry experience in ASIC design verification
Additional Required Qualifications
Experience verifying digital logic for CPU, GPU, SoC, and ASICs with High-Speed I/O interfaces such as PCIE or CXL
Hands-on experience in standard verification methodologies such as VMM, OVM, or UVM
Strong in coding with System Verilog, SVA, Python, and C/C++
Strong debugging, analytical, and communication skills
Strong collaborator as we believe in no boundaries and collaboration across the entire organization with access to all levels and departments
Proven track record of successful full-cycle DV development from planning to product of an ASIC chip or a complex subsystem
Knowledge of machine learning architecture and/or computer architecture
Experience with machine learning and artificial intelligence applications
Strong understanding of one or more of the following domains: computation / interconnect / memory systems
Team leadership experience
Experience in prototyping / silicon bring-up
Annual Salary Range and Level
The base salary for this position ranges from $140,000/year up to $160,000/year.
This range is based on role, level, and location and reflects the salary target for new hires in the US.
Individual pay within the range will depend on a number of factors, including a candidate's job-related qualifications, skills, competencies and experience, and location.
Benefits SummarySambaNova offers a competitive total rewards package, including the base salary, plus equity and benefits.
We cover 95% premium coverage for employee medical insurance, and 80% premium coverage for dependents and offer a Health Savings Account (HSA) with employer contribution.
We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life and AD&D insurance plans in addition to Flexible Spending Account(FSA) options like Health Care, Limited Purpose, and Dependent Care.
Our library of well-being benefits includes a full subscription to Headspace, access to One Medical, counseling services with an Employee Assistance Program, and much more.
#LI-SB1Submission Guidelines
Please note that in order to be considered an applicant for any position at SambaNova Systems you must submit an application form for each position for which you believe you are qualified.
If you are a new, recent (within the last two years), or upcoming college graduate and are interested in opportunities with SambaNova Systems, please apply through our University job listings.
EEO PolicySambaNova Systems is an Equal Opportunity/Affirmative Action Employer.
All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and any other applicable status protected by federal, state, or local laws.
Customers turn to SambaNova to quickly deploy state-of-the-art AI capabilities to meet the demands of the AI-enabled world. Our purpose-built enterprise-scale AI platform is the technology backbone for the next generation of AI computing. We enable customers to unlock the valuable business insights trapped in their data. Our flagship offering, SambaNova Suite, provides the most accurate generative AI models, optimized for enterprise and government organizations, deployed on-premises or in the cloud, and adapted with an organization's data for greater accuracyHeadquartered in Palo Alto, California, SambaNova Systems was founded in 2017 by industry luminaries, that include hardware and software design experts from Sun/Oracle and Stanford University.
Investors include SoftBank Vision Fund 2, funds and accounts managed by BlackRock, Intel Capital, GV, Walden International, Temasek, GIC, Redline Capital, Atlantic Bridge Ventures, Celesta, and several others.
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