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    Senior Principal RFIC Design engineer - San Diego, United States - Protingent

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    Direct Hire
    Description
    Position Title: Senior Principal RFIC Design engineer

    Position Description: Protingent Staffing has an exciting direct hire opportunity for Senior Principal RFIC Design engineerwith our client that is located in Sunnyvale, CA.

    Job Responsibilities:
  • Lead RF Synthesizer/PLL architecture, design, layout, characterization and commercialization: from concept to implementation, ensuring competitive KPIs for mmWave base station and CPE applications.
  • Architecture Definition: Collaborate with cross-functional teams to define RF Synthesizer architecture, spec, understanding and balancing performance, area, and power consumption requirements.
  • Technical Leadership: Provide technical expertise, guidance, and mentorship to a team of engineers, fostering a collaborative and innovative work environment. Create processes and checklists to improve team's productivity and improve product execution flow.
  • Drive package and PCB design/layout, modeling them using EM tools, importing models to simulation environment and run extensive simulations to capture the impacts of package and PCB on RFIC performance.
  • Full IC Design Flow: Drive the overall IC design and verification flow, compensation, and calibration, bias circuit, power supply, power management, product yield and reliability analysis, design kits, foundry process, PDK and related design documents, Production Variations, Support of Evaluation Board Design, Design Validation, and mentoring junior engineers.
  • Product Yield and Production Variations Analysis: Considerations, analysis and simulation of production yield, variations, calibration process.
  • Production ATE Development: Work with Test Engineers to define, develop and ramp production ATE solutions.
  • Product Support: Work with Applications, Product, Test and Manufacturing Engineers to help answer customer questions, assess field failures, support yield improvements, etc.
  • Technology Development: work with Technologists to define the technology roadmap, addressing the performance and functional requirements of the product roadmap.
  • Simulation and Validation: Conduct extensive simulations, modeling, and validation of circuits using industry-standard EDA tools such as AMS and System Verilog to ensure robust performance and functionality across various operating conditions.
  • Silicon Characterization: Collaborate with the test team to define test plans and support silicon characterization efforts to validate and debug the chip's performance.
  • Design Documentation: Prepare comprehensive design documentation, including specifications, design reviews, and data reviews ensuring efficient knowledge transfer within the team.
  • Project Management: Manage project timelines and deliverables, ensuring milestones are met promptly and the project remains on track.
  • Intellectual Property: Contribute to the creation and protection of intellectual property through patents, solidifying our Kyocera's position as an industry leader.
  • Job Qualifications:
  • MS. or Ph.D. in Electrical Engineering, or related fields, with a focus on RF/analog/mixed-signal circuit design with 15+ years of industry experience, including 5+ years of mmWave RF Synthesizer design
  • Have experience in leading RF Synthesizer module for mmWave frequency range, including Sampling PLL, achieving stringent phase noise and jitter spec
  • IC Circuit Architecture and Tradeoff: Deep understanding of device physics and models, circuit architecture, and design tradeoffs.
  • Experienced in IC circuit design and analysis and critical layout: Fractional-N and Integer-N sampling (sub-sampling) PLL, VCO, N-Divider, DSM, Charge-pump, DTC, TDC, ...
  • Experience with phase alignment of multiple fractional-N PLLs and LO dividers is a plus
  • EM structure: In-depth knowledge of EM structures: microstrip, combiners, coupler, transformer, directional coupler, mutual coupling and shielding analysis.
  • Strong expertise in CMOS and SOI process technologies, deep sub-micron nodes, and RFIC layout techniques.
  • Proficiency in EDA tools such as Cadence, Spectre, Virtuoso, AMS and familiarity with hardware description languages (e.g. Verilog).
  • Excellent analytical and problem-solving skills, with a keen eye for detail.
  • Effective communication and teamwork skills, with the ability to collaborate with cross-functional teams.
  • Demonstrated ability to mentor and guide junior engineers.
  • Familiarity with industry standards, protocols, and compliance testing.
  • Job Details:
  • Direct hire
  • Salary Range: $214,000 - $348,000
  • Location: San Diego, CA

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