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    IC Package Design Engineer - San Diego, United States - Apple

    Apple
    Apple San Diego, United States

    2 weeks ago

    Apple background
    Description
    Summary

    Posted: Feb 19, 2024

    Role Number:

    Do you like to work on groundbreaking technologies that enable amazing new products? Do you have the attention for details and love for excellence to work towards an extraordinary result? Envision what you could do here At Apple, we believe new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish Our Hardware Technology Packaging team invents, designs, develops and integrates electronic packaging solutions for Apple's internal and custom external components of hardware for its consumer electronic products such as iPhone, iPad, Mac, Apple Watch, Apple TV, etc. In this highly visible role, you will own and drive sophisticated package selection, new generation product package structure and configuration optimization. You will be responsible for Package/SIP/module physical design and layout, optimization, design verification and tape out; and work with multi-functional teams to achieve optimized mechanical / electrical / thermal performance for various types of chips.

    Description

    - Implement the physical design of packages and modules for SoC, Memory, RF and cellular chips. - Define and develop design verification and automation strategy to strengthen and streamline package design and release flows. - Drive methodology, innovations, and efficiency improvements in package design together with vendors and developers on feature development and bug resolution. - Interface and coordinate with cross-functional groups throughout Apple on new product package/SiP/module feasibility analysis, design and selection. - Ensure package design is optimized with SI/PI requirements. - Explore, evaluate and develop new CAD tool, design and verification flow. - Collaborate in multi-functional discussions for package architecture and technology roadmap (partner with Silicon PD team to optimize chip Floorplan and bump placement and minimize package size/build positive relationships with the Systems team for optimizing package pin out). - Identify and drive cost saving opportunities and/or performance enhancing features. - Perform extraction of S-parameters and package RLGC model.

    Key Qualifications
    • Hands-on experience with package design and proficient in Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP) or Mentor Xpedition platform tools.
    • Solid fundamentals in electrical/material/thermal/mechanical engineering field.
    • Familiarity with various sophisticated package configurations and assembly / substrate technology (wirebond, POP, etc.).
    • SI/PI tools (XtractIM, PowerSI, HFSS, Q3D, etc.), package model extraction, S-parameters and RLGC model.
    • Substrate manufacturing process, structure, design rules and material property.
    • Solid understanding of high-speed interfaces, including DDR, PCIe, NAND, etc.
    • Exposure to Unix environment, scripting languages (PERL, Python, TCL and or shell) and methodology.
    • Good understanding of system specification and IC design, ability to work with design teams to translate IC / system requirement into package / SIP configuration.
    • Consistent track record to drive package selection through feasibility studies and drive chip Floor planning and bump assignment.
    • Preferred Experience:
    • Familiar with package design reviews and familiarity with CAM350/Valor or Calibre and CAD.
    • Knowledge of high-speed layout constraints (crosstalk mitigation, differential pairs, EMI/RFI, PCB/package resonance).
    • Design experience with RFIC and 5G packages, SIP or module schematic and layout design. Hands-on knowledge of Design Rules Check and Design for Manufacturing.
    • Experience with TSV, 2D/2.5D and 3D package connection.
    • Familiar with Cadence Concept HDL for schematic review, experience in schematic capture and system integration.
    Education & Experience

    - BS and 10+ years of relevant industry experience.

    Additional Requirements

    Pay & Benefits
      At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $161,700 and $284,900, and your base pay will depend on your skills, qualifications, experience, and location.

      Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.

      Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

    More
    • Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
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