- Responsible for all aspects of verification methodology employed and for ensuring the application of uniform standards and adoption of best practices.
- Work and liaison with other Design Verification teams within our customer sites to identify holes in the design verification flow and implement corrective action.
- Overall, responsible for verification of ASIC designs To include such things as:
- Work closely with company's design team to ensure the Company is meeting design requirements for projects This may include: review of specifications, understanding chip architecture, developing tests & coverage plans, and defining methodology & test benches.
- Work closely with company's Custom SoC department to provide great customer service to our clients and the projects at hand Support, encourage and drive timely and accurate deliverables with customers within schedules
- BS or MS in Computer Science or Electrical Engineering.
- 5-10+ years of industry experience bringing silicon ICs into high volume production.
- Must have strong experience with UVM.
- Must have a full chip verification experience
- Experience of leading a single project.
- Knowledge of industry standard interfaces Extensive Familiarity with Verilog, Simulation tools & demonstrated ability to debug Problems & Troubleshoot in Real Time.
- Sound knowledge of ARMv8, interconnect, memory coherence and memory architectures
- Familiarity with Formality & most popular Verification Tools (Key knowledge should include such topics as: IP validation, Gate level verification, FPGA Validation, Emulation, Silicon Validation, Reference Board bring up verification, Silicon Bring up, DFx, Low Power Verification)
- Expertise in writing Perl / Python , awk, sed & Common Scripts to automate the Verification Tasks for CPU plus all Chip peripherals - USB, PCIe, MIPI, SDIO, PCI E & DDR Controllers.
- Advanced knowledge of ASIC design and verification flow including RTL design, simulation, test bench development, regression, equivalence checking, timing analysis, scan insertion and test pattern generation
- Experience with low-level programming of systems in C/C++.
- Experienced in writing scripts in languages such as Perl, Python, and Tcl.
- Functional understanding of constrained random verification process, functional coverage, and code coverage.
- Low power verification UPF
- Team player with excellent communication skills and the desire to take on diverse challenges.
- Customer interaction
- Good knowledge of low power camera and imaging systems is a plus
- Experience with formal verification tools is a plus.
- CPU Security, Secure boot, Secure JTAG
- Familiarity with ARM architecture
- Familiarity with scripting/programming with Perl/Python, Tcl, C/C++
-
Design Verification Engineer
2 weeks ago
Ripple Technology Inc. Milpitas, United StatesQualifications:MS or higher degree in EE, CS or related fields,Experience requirements:Entry level positions: 0-2 years of experienceSenior and above level positions: a minimum of 2 years of experienceProficiency in System Verilog, Object Oriented Programming, Scripting Languages ...
-
Design Verification Engineer
1 week ago
ATR International Milpitas, United StatesThe role is a technical, hands-on, in charge of the verification environment for new silicon projects and developments We are looking for an experienced professional with Passion & Drive to succeed. · Primary Responsibilities Include: · • Responsible for all aspects of verificat ...
-
Verification Engineer
1 week ago
Jobot San Jose, United StatesCome deliver innovative solutions that exceed expectations every time with an amazing company · This Jobot Job is hosted by: Samantha Cunningham · Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume. · Salary: $125,000 - $175,000 per year · ...
-
Verification Engineer
3 weeks ago
Broadcom Corporation San Jose, United StatesPlease Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · The ASIC Product Divisio ...
-
Verification Engineer
2 weeks ago
Broadcom Corporation San Jose, United StatesPlease Note: · 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · Job duties include: Veri ...
-
Design Verification Engineer
6 days ago
GAC Solutions Santa Clara, United StatesTitle - Design Verification Engineer · Location - Santa Clara, CA (Onsite) · Duration - 6+ Months · "Desired Qualifications: · • Over 7 years of hands-on experience in pre-silicon design verification. · • Proficient in scripting with C-shell, along with mastery in Verilog-HDL an ...
-
Senior Verification Engineer
1 week ago
IC Resources San Jose, United States Full timeJoin one of the world's foremost RISC-V companies as a Senior Verification Engineer, contributing to the development of cutting-edge CPU products for applications such as 5G, AI, and machine learning. · As a top company they offer competitive compensation, benefits, and full rem ...
-
Design Verification Engineer
3 days ago
AMD San Jose, United States Full time· WHAT YOU DO AT AMD CHANGES EVERYTHING · We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for th ...
-
Design Verification Engineer
6 days ago
Synapse Design Inc. San Jose, United StatesSynapse ( A Quest Global Company) is seeking talent for mixed signal design verification engineer job position. Below is the job description :: · Title :: Analog Mixed Signal Design Verification Engineer · Location :: San Jose,CA · Staff Verification with a some design experienc ...
-
Design Verification Engineer
1 day ago
AMD San Jose, United States Full time· WHAT YOU DO AT AMD CHANGES EVERYTHING · We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for th ...
-
Design Verification Engineer
3 weeks ago
Intelliswift Software San Jose, United StatesTitle: Design Verification Engineer · Location: San Jose, CA, Austin, TX, Phoenix, AZ · Duration: 12 Months. · Pay Rate: $75 to $80/hr · Job Description: · Testbench development - System Verilog UVM and C tests · Integration/development of C tests/APIs and SW build flow · Integra ...
-
Design Verification Engineer
1 week ago
EDA Cafe Milpitas, United StatesThis is a full-time on-site role for a Design Verification Engineer located in Milpitas, CA. The Design Verification Engineer will be responsible for formal verification, RTL design, computer architecture, functional verification, and debugging. · Qualifications · Experience in f ...
-
Verification Engineer
15 hours ago
Collabera Sunnyvale, United States· Home · Search Jobs · Job Description · Verification Engineer · Contract: Sunnyvale, California, US · Salary: $50.00 Per Hour · Job Code: · End Date: · Days Left: 27 days, 3 hours left · Apply · Job Summary: · Working under limited supervision, performs moderate risk/mo ...
-
Verification Engineer
2 days ago
Collabera Sunnyvale, United StatesHome · Search Jobs · Job Description · Verification Engineer · Contract: Sunnyvale, California, US · Salary: $50.00 Per Hour · Job Code: · End Date: · Days Left: 26 days, 3 hours left · Apply · Job Summary:Working under limited supervision, performs moderate risk/moderat ...
-
Design Verification Engineer
4 weeks ago
DBSI Services, Inc. Milpitas, United StatesBenefits:401(k) · 401(k) matching · Dental insurance · Health insurance · Paid time off · Vision insurance · Job Title: Design Verification Engineer · Job Location: Milpitas, CA · Description: · Primary Responsibilities Include: · •Responsible for all aspects of verification ...
-
Design Verification Engineer
1 week ago
Mirafra Technologies Santa Clara, United StatesLooking to add DV Engineers in Irvine, San Diego and Santa Clara. · On going needs additional 10 engineers in team. · Position detail: SOC verification · Experience level : 5-20 years · Architect block and full-chip verification environments using HVLs and constrained random ...
-
Senior Verification Engineer
1 day ago
NVIDIA Santa Clara, United StatesWe are now looking for a Senior Verification Engineer for our Tegra group · NVIDIA is seeking outstanding Senior Verification Engineers to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a m ...
-
Design Verification Engineer
18 hours ago
Trilyon, Inc. Santa Clara, United StatesJob Description · Job DescriptionFor over 15 years, Trilyon has been at the forefront of providing comprehensive global workforce solutions and staffing services. Leveraging our extensive expertise across multiple domains such as Cloud technology, Salesforce, AI, Machine Learning ...
-
Design Verification Engineer
3 weeks ago
Ampcus Santa Clara, United StatesRole: Design Verification Engineer · Work Location: Santa Clara, CA · Background check: Mandatory · Meet and great: Mandatory · JOB DESCRIPTION: · Responsibilities: · • Architect and Create verification environments using System-Verilog and Universal verification methodolog ...
-
Senior Verification Engineer
1 week ago
NVIDIA Santa Clara, United StatesNVIDIA is looking for a Verification Engineer to join our Emulation division. We are a worldwide recognized division noted for groundbreaking technology. We are work-flex, family and diverse team NVIDIA invention of the GPU in 1999 accelerated the growth of the PC gaming market, ...
Design Verification Engineer - Milpitas, United States - ATR International
Description
The role is a technical, hands-on, in charge of the verification environment for new silicon projects and developments We are looking for an experienced professional with Passion & Drive to succeed.
Primary Responsibilities Include:
oDesign Verification - Implement test benches in UVM and Sytem Verilog, run regressions at RTL and gate level, generate and report DV metrics with respect to bug tracking and code coverage, debug failures and provide feedback to the design team.
oResponsible for oversight and completion of debugging problems and troubleshooting in Real Time This includes being responsible for Debugging Designs for High throughput, Low Latency of Pipeline and Dynamic Power Management at full system level.
oSetup Verification Regression suites at RTL Level & Corresponding Netlist Level after Synthesis to test any/all Corner case conditions.The ideal candidate will possess the following qualifications:
Other Qualifications:
Benefits:
401(k)
401(k) matching
Dental insurance
Employee assistance program
Flexible spending account
Health insurance
Health savings account
Life insurance
Paid time off
Referral program
Vision insurance
#Pando