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    Director, Design Verification Engineering - Austin, United States - Tenstorrent

    Tenstorrent
    Tenstorrent Austin, United States

    59 minutes ago

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    Description
    Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency.

    With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors.

    Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible.

    We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

    The RISC-V CPU Design Verification Engineering Leader will be responsible for the pre-silicon RTL verification of high performance CPU microarchitectures going into industry leading AI/ML architecture.


    A strong computer architecture background and a strong foundation in verification methodology will be used to close testing coverage with high confidence.

    This role is hybrid, based out of Austin, TX or Santa Clara, CA.

    Responsibilities:
    Provide strong leadership to expert engineers to develop and execute DV testplans for ISA and microarchitecture
    Collaborate with multi-functional leaders for the RTL, Physical Design, and CPU Performance teams
    Use SystemVerilog, UVM, C++ and scripting languages with industry-leading simulation tools and methodologies to verify complex CPU designs
    Negotiate program objectives with Architecture, Design and Software teams, and lead your team through planning, execution and closure
    Support individual development and goal definition, whilst aligning team vision for outstanding results

    Experience & Qualifications:
    BS/MS/PhD in Computer Engineering, Electronic Engineering or related field
    Deep knowledge and understanding of Computer Architecture, Microprocessor DV methodology, DV processes, testbench design, and quality requirements
    Prior DV ownership of complex IP at Unit, Sub-system, or Top-level as well as experience managing an engineering team
    Ability to influence organizational objectives and align teams
    Expert knowledge of hardware description languages (Verilog, VHDL) and methodologies
    Excellent planning and communication skills, with strong ability to collaborate across sites and disciplines
    Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
    Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
    Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set

    by the U.S. government.
    Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject toU.S.

    Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee informationand/or documentation will be required and considered as Tenstorrent moves through the employment process.

    If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government. If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.

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