- Modern design methodology – RTL, ASMs, Verilog;
- Semiconductor device physics and MOS modeling, Static and dynamic CMOS combinational logic gate, capacitance, and switch level modeling, latches and clocking, Cadence Composer for schematic entry, Cadence virtuoso for layout design, Cadence Spectre for circuit simulation, Mentor Calibre for layout verification, Mentor xRC for extraction;
- Verilog coding, circuit netlist scripting, SPICE simulation, logic synthesis, static and dynamic timing/power analysis, library characterization, placement and routing(P&R), parasitic extraction, parasitic-annotated simulation;
- Python scripting; Matlab simulation.
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Mechanical Design Engineer 4
2 weeks ago
Dawar Consulting, Inc. Milpitas, United StatesOur client, a world leader in the semiconductor industry, is looking for a "Mechanical Design Engineer 4". · Job Title: Mechanical Design Engineer 4 · Shift Hours: 9 AM- 5 PM · Job Duration: Long-term Contract on W2 (Onsite) · Location: Milpitas, CA · Company Benefits: · Health ...
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Design Engineer/Senior Design Engineer
3 weeks ago
NVIDIA Corporation Santa Clara, CA, United StatesSenior ASIC Design Engineer page is loaded Senior ASIC Design Engineer · Apply locations US, CA, Santa Clara time type Full time posted on Posted 5 Days Ago job requisition id JR NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's lea ...
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Design Engineer/Senior Design Engineer
3 weeks ago
NVIDIA Corporation Santa Clara, CA, United StatesSenior Design Engineer, Coherent High Speed Interconnect page is loaded Senior Design Engineer, Coherent High Speed Interconnect · Apply locations US, CA, Santa Clara US, MA, Westford US, TX, Remote US, CA, Remote US, Remote time type Full time posted on Posted 2 Days Ago job re ...
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Design Engineer
1 week ago
Midas Consulting Santa Clara, United StatesTitle: Design Engineer · Location: Santa Clara, CA (Day one on-site) · Required Skills/Experience: · Professional Experience 5-6 Years · Create concepts and · DFM compliant 3D models & assemblies using Solidworks. · Proficiency in Solid works-Routing, Weldments & basic knowled ...
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Design Engineer
2 weeks ago
Midas Consulting Santa Clara, United StatesTitle: Design Engineer · Location: Santa Clara, CA (Day one on-site) · Required Skills/Experience: Professional Experience 5-6 Years · Create concepts and DFM compliant 3D models & assemblies using Solidworks. · Proficiency in Solid works-Routing, Weldments & basic knowledge ...
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Design Engineer/Senior Design Engineer
3 weeks ago
CYNET SYSTEMS Santa Clara, CA, United StatesJob Description: · Pay Range $50.64hr - $75.92hr · Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff. · Drive the effort to maintain RTL quality metrics in complex, hierarchical designs and automatin ...
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Engineering Designer Llnl
1 week ago
General Atomics and Affiliated Companies Livermore, United StatesGeneral Atomics (GA), and its affiliated companies, is one of the world's leading resources for high-technology systems development ranging from the nuclear fuel cycle to remotely piloted aircraft, airborne sensors, and advanced electric, electronic, wireless and laser technologi ...
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Design Engineer
1 week ago
Infobahn Softworld Inc San Jose, United StatesJOB DUTIES: · Responsible for RTL design using Verilog HDL for implementation and debug. · Read and comprehend System on Chip level architectural specification. · Write microarchitecture specification for new and modified functions. · Responsible for linting and simulation of ...
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Design Engineer
1 week ago
BKF Engineers San Jose, United States· We are hiring a Design Engineer to work out of our San Jose office · We are looking for an individual who can apply standard engineering techniques, procedures, and criteria using their education, experience and judgment. You will provide assistance to the Project Engineers a ...
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Product Engineer/Design Engineer
3 weeks ago
Intel Corporation Santa Clara, CA, United StatesIntel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. Join us, because at Intel, we are building a better tomorrow. Intel NEX Cloud ...
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Design Engineer/Senior Design Engineer
3 weeks ago
USA Tech Recruitment San Jose, CA, United StatesAre you an ASIC Design Engineer that is on the market for a new opportunity at a highly funded and expanding startup, working on cutting edge projects at the forefront of autonomous driving and AI as a whole? · At European Recruitment we are working alongside a widely successful ...
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Design Engineer
2 weeks ago
Innogrit San Jose, United StatesJob Description · Job Description Salary: DOE · Job description · Contribute to micro-architecture designs for state-of-the-art high-speed low-power digital IPs. · Implement design modules using hardware description language (HDL). · Design schemes for multi-clock domain crossin ...
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Design Engineer
1 week ago
Broadcom Corporation San Jose, United StatesBroadcom's Timing Sign-Off group in Central Engineering is looking for an energetic and self-driven professional to join our team. Our groups mission is to provide an advanced timing sign-off flow to Broadcoms chip teams with the goal to achieve be Design Engineer, Development, E ...
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Design Engineer
5 days ago
Infobahn Softworld San Jose, United StatesJOB DUTIES: · Responsible for RTL design using Verilog HDL for implementation and debug. · Read and comprehend System on Chip level architectural specification. · Write microarchitecture specification for new and modified functions. · Responsible for linting and simulation of des ...
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Design Verification Engineer
2 weeks ago
Mirafra Technologies Santa Clara, United StatesLooking to add DV Engineers in Irvine, San Diego and Santa Clara. · On going needs additional 10 engineers in team. · Position detail: SOC verification · Experience level : 5-20 years · Architect block and full-chip verification environments using HVLs and constrained random ...
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Design Engineer
2 weeks ago
Broadcom Corporation San Jose, United StatesPlease Note: · 1. If you are a first time user, please create your candidatelogin account before you apply for a job. (Click Sign In > Create Account) · 2. If you already have a Candidate Account, please Sign-In before you apply. · Job Description: · Broadcom's Timing Sign-Off g ...
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Design Engineer/Senior Design Engineer
3 weeks ago
Cepton Technologies San Jose, CA, United StatesCepton (Nasdaq: CPTN), a leading intelligent lidar solution provider, is seeking a seasoned Senior ASIC Design Engineer who is passionate about solving challenges to join us and support the development of Lidar products. Working closely with our Director of ASIC Engineering and p ...
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Analog Design Engineer
1 week ago
Intellectt Inc Santa Clara, United StatesJob Description & Skill Requirement: · 5- 10yrs Exp range engineers Required · Port schematics from the previous project · Run pre-layout simulations and implement ECOs to meet design targets · Prepare and present Pre-Layout Design Review · Guide layout engineer to implement the ...
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Senior Design Engineer
3 weeks ago
Nvidia Santa Clara, CA, United StatesWe are now looking for a Senior Hardware Design Engineer for our Tegra group:NVIDIA is seeking passionate Senior Hardware Design Engineers to architect, design and verify the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifacet ...
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RTL Design Engineer
1 week ago
Infobahn Santa Clara, United StatesWe have an immediate opportunity with one of our direct clients. Please find the job description below and if you are interested, please forward your resume and share below details: · Best contact number: · Work Authorization: · Hourly Payrate expected (W2): · Month & Day of ...
SoC Design Engineer - Santa Clara, United States - Omni Vision Inc
Description
Be responsible for digital design of image sensor, SoC integration and IP design, analysis, integration, and validation. Work closely with back-end team in floor-planning, timing closure and DFT. Conduct image sensor array/analog related timing control design and STA. Perform chip bring-up, validation and debugging. Design, integrate and validate ISP data pipes according to PRD/design specification and system architecture of SoC CIS products, following ASIC design flow: coding, simulation, synthesis, static timing analysis, formality verification, DFT, using Simvision, EDA tools such as Prime Time, cadence Virtuoso, Design Compiler, Integrator, and Verilog and System Verilog programming languages etc. Conduct design verification and modeling using SVA, Python, Perl. Work with sensor digital and analog engineers for system design, integration and validation. Work with algorithm engineers for module level design, including hardware C model implementation, micro architecture design, RTL design and hardware/software co-simulation. Work with algorithm andapplication engineers for image tuning and qualification. Conduct silicon validation, debugging and tuning.
Bachelor's degree in Electrical Engineering, Computer Engineering, or related fields with course work of Digital Imaging Processing, Logic Design, VLSI, Analog and Digital Circuits, and two (2) years of digital design experience. Will accept a Master's degree in the same disciplines in lieu of the 2 years of experience.
Required experience or skills:
Annual base salary for this role in California, US is expected to be between $126,984 - $130,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.