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    Design Verification Engineer - Austin, United States - Infobahn Softworld Inc

    Infobahn Softworld Inc
    Infobahn Softworld Inc Austin, United States

    3 weeks ago

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    Description

    Role: Emulation Methodology Engineer

    Location: Austin, TX

    Duration: 6+ months contract

    Job Summary:

    • Implement enhancements using cutting-edge emulation technology.
    • Support emulation methodology & tools (Veloce, Palladium & ZeBu) as part of the central methodology team.
    • Create App Notes & Articles for commonly asked questions.
    • Develop emulation tools, workflows, and infrastructure in partnership with various teams to boost productivity during debugging, runtime, and data analysis.
    • Design emulation validation components to optimize testing, debugging, and automation.
    • Configure and troubleshoot PCIe, DDR, and generic SOC interfaces.
    • Integrate and initialize 3rd party accelerated verification IPs.
    • Solve emulation challenges and propose effective methodologies.
    • Implement ML/AI applications in emulation environments.

    Required Skills:

    • 5+ years of experience in Emulation-based Verification using Cadence Palladium, Synopsys Zebu, or Mentor Veloce.
    • Proficient in C/C++, Verilog, System Verilog, UVM, assembly, and Perl/Python programming.
    • Skilled in debugging intricate SOC, GPU, or CPU core designs.
    • Experience in diagnosing regressions and debugging down to RTL or Testbench issues.
    • Able to develop and optimize emulation transactors.
    • Familiarity with UPF and Power Estimation-based Emulation is advantageous.
    • Potential for a contract-to-hire transition.
    • One month notice preferred if ending the assignment early for smooth knowledge transfer.

    Thanks & Regards..,

    Shaik Hyder

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