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    Wireless MAC ASIC Design Engineer - San Jose, United States - Spreadtrumusa

    Spreadtrumusa
    Spreadtrumusa San Jose, United States

    3 weeks ago

    Default job background
    Description
    Wireless MAC ASIC Design Engineer (All levels)

    As a member of our engineering team, you will work on the latest WLAN technology and product development. Successful candidates will be participating in the design of leading edge ASICs for Wireless Connectivity SoC platform.
    Responsibilities

    The Wireless MAC ASIC design engineer is responsible for the design and implementation of WiFi MAC hardware.

    Duties include, but are not limited to:
    Architect and develop microarchitecture of various processing blocks in WiFi MAC hardware and design interface to WiFi PHY and SoC
    Support HW and SW partitioning and design mapping to hardware MAC and software MAC
    Implement and deliver MAC hardware RTL, assist the MAC hardware front-end simulation, synthesis, timing and power analysis.
    Develop unit-level verification and work with DV engineer for integrated-level verification.
    Lint, CDC check and assist in all difference level of ASIC simulation.
    Collaborate with hardware design and firmware/software teams for FPGA prototyping and SoC Lab validation
    Experience

    The Wireless MAC ASIC design engineer is responsible for the design and implementation of WiFi MAC hardware.

    Duties include, but are not limited to:
    Architect and develop microarchitecture of various processing blocks in WiFi MAC hardware and design interface to WiFi PHY and SoC
    Support HW and SW partitioning and design mapping to hardware MAC and software MAC
    Implement and deliver MAC hardware RTL, assist the MAC hardware front-end simulation, synthesis, timing and power analysis.
    Develop unit-level verification and work with DV engineer for integrated-level verification.
    Lint, CDC check and assist in all difference level of ASIC simulation.
    Collaborate with hardware design and firmware/software teams for FPGA prototyping and SoC Lab validation
    KNOWLEDGE, SKILLS, & COMPETENCY REQUIREMENTS
    Knowledge of IEEE b/a/g/n/ax/ax/be) WLAN MAC protocol is desired
    Experience of digital design and RTL implementation is must
    Experience ASIC flow from micro-architecture development, RTL coding, CRC/RDC, power analysis, Synthesis and STA and timing closure, to final tape-out and production support is required
    Verilog/ SystemVerilog programming skills is required. Other programming skills (Python, C/C++, Perl, TCL, etc.) is a plus
    Expertise in verification and validation of MAC IPs is desired.
    Experience of low power design is a desired

    The following traits are highly valued:
    Knowledge of wireless MAC layer processor including WiFi, Bluetooth, UWB, 4G LTE and 5G NR hardware is a plus

    Experience of SoC architecture, on-chip SoC bus protocol, framers/deframers and data movers, encryption and decryption and embedded subsystems is a plus.

    #J-18808-Ljbffr
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