STA Engineer - San Francisco Bay Area
3 weeks ago

Job description
, consectetur adipiscing elit. Nullam tempor vestibulum ex, eget consequat quam pellentesque vel. Etiam congue sed elit nec elementum. Morbi diam metus, rutrum id eleifend ac, porta in lectus. Sed scelerisque a augue et ornare.
Donec lacinia nisi nec odio ultricies imperdiet.
Morbi a dolor dignissim, tristique enim et, semper lacus. Morbi laoreet sollicitudin justo eget eleifend. Donec felis augue, accumsan in dapibus a, mattis sed ligula.
Vestibulum at aliquet erat. Curabitur rhoncus urna vitae quam suscipit
, at pulvinar turpis lacinia. Mauris magna sem, dignissim finibus fermentum ac, placerat at ex. Pellentesque aliquet, lorem pulvinar mollis ornare, orci turpis fermentum urna, non ullamcorper ligula enim a ante. Duis dolor est, consectetur ut sapien lacinia, tempor condimentum purus.
Access all high-level positions and get the job of your dreams.
Similar jobs
This is a full-time, on-site role for Senior Physical Design Engineer/STA located in California, · This Senior Physical Design Engineer will be responsible for end-to-end implementation of physical design processes, · ,timing closure,power optimization,and collaborating with cros ...
3 weeks ago
Saika Technologies looking for DFT Engineer with more than · 6 years of experience. · Perform full‑chip and block‑level static timing analysis · for advanced ASIC designs. · ...
1 month ago
We're seeking an experienced Frontend Synthesis/STA Engineer to join our team. · Design and implement digital circuits using Verilog or VHDL · Perform synthesis and optimization of digital designs · Conduct static timing analysis (STA) to ensure design meets timing requirements · ...
2 weeks ago
This confidential company is strategically bringing on a hands-on technical STA lead. The timing design expert will collaborate cross-functionally with systems HW engineers and SW architects to develop cutting-edge computing systems. · Perform static timing analysis (STA) on digi ...
1 month ago
Position Overview · We are seeking an experienced Frontend Synthesis / Static Timing Analysis (STA) Engineer to join our ASIC design team. This role will focus on RTL-to-gate-level implementation, timing closure, and optimization across complex digital designs. · The ideal candid ...
5 days ago
+We're building cutting-edge silicon solutions—and we're looking for a Lead-level DFT Engineerwho wants to push quality and test thinking earlier into the design lifecycle. · Push DFT into RTL as early as possible – influence architecture, not just implementation · Early DFT veri ...
2 weeks ago
We are building next-generation AI compute silicon that redefines performance per watt at advanced process nodes. We're seeking a Founding Physical Design Engineer specializing in Physical Design to own GTM-critical RTL-to-GDSII execution on our reconfigurable XPU architecture. · ...
4 weeks ago
We are building next-generation AI compute silicon that redefines performance per watt at advanced process nodes. We're seeking a Founding Physical Design Engineer specializing in Physical Design to own GTM-critical RTL-to-GDSII execution on our reconfigurable XPU architecture. L ...
1 month ago
Lumicity are partnered with a exciting an AI infrastructure start-up working on advanced data movement and compute connectivity solutions to improve efficiency for large AI models. · ...
3 weeks ago
Eximietas is a premier silicon design services company, delivering high-performance and scalable IP and SoC solutions to global semiconductor leaders. We thrive on deep technical expertise, clean execution, and a culture of innovation. · As we scale, we're looking for experienced ...
1 week ago
+Job summary · Our client is an early-stage AI infrastructure startup building the foundation for how complex documents are transformed into structured, LLM-ready data. · +ResponsibilitiesArchitecting and scaling backend services powering document intelligence workflows · ...
3 weeks ago
We are seeking a Senior Design Engineer to lead architecture, · design integration and implementation of advanced SoCs. · Rtl design ip configuration integration synthesis collaboration physical design teams timing closure support next-generation compute architectures efficient i ...
2 weeks ago
We are seeking a highly motivated Physical Design Engineer to join our ASIC implementation team. The ideal candidate is technically strong in advanced-node implementation, timing closure, and physical sign-off, while also being collaborative and team-oriented. · This role will co ...
5 days ago
SBT is the exclusive executive recruiting firm for this confidential position. · Company Overview · This confidential startup company is a well-funded, high-growth AI hardware innovator building next-generation SoC solutions for high-performance applications. Backed by significan ...
5 days ago
We are developing the next generation of chip design automation tools with a focus on performance.We envision a future where hardware engineers benefit from advances in AI and believe the first place to start is with advanced optimization tools. · ...
1 month ago
We envision a future where hardware engineers benefit from advances in AI. · We're looking for engineers who think in terms of intermediate representations and passes — people who can design the data models that physical-design tools run on, not just use them.Design the core inte ...
1 month ago
Senior Cloud & IoT Engineer (AWS | Python | MQTT) · Location: San Bruno, CA (Hybrid — 2 days/week onsite) · Employment Type: Contract-to-Hire · Level: Senior · About the Rol · eWe are partnering with a rapidly growing, mission-driven technology organization to hire a Senior Cloud ...
1 week ago
We're Building the Next Generation of Chips to Power AI. Join Us. · At Zetta, we're building the next NVIDIA. Our novel polymorphic chips are a generation ahead of anything on the market. We're essentially building the substrate that will power all future knowledge and scientific ...
1 month ago
We are developing the next generation of chip design automation tools with a focus on performance, scalability and productivity. We envision a future where hardware engineers benefit from advances in AI and believe the first place to start is with advanced optimization tools. · D ...
1 month ago
· At Zetta we're building the next NVIDIA Our novel polymorphic chips are a generation ahead of anything on the market We're essentially building the substrate that will power all future knowledge and scientific discovery · The team consists of exceptional engineers obsessed wit ...
1 month ago
Job summary · We're Building the Next Generation of Chips to Power AI. · At Zetta we are building next generation of chips that power knowledge and scientific discovery. · ...
1 month ago