DFT Engineer - San Francisco
6 days ago
Job summary
We're building cutting-edge silicon solutions—and we're looking for a Lead-level DFT Engineerwho wants to push quality and test thinking earlier into the design lifecycle.
<+Responsibilities
- Push DFT into RTL as early as possible – influence architecture, not just implementation
- Early DFT verification across: Memory + scanBlock-level and chip-levelBring strong STA expertise from a test perspective (this is critical)Own ATPG verification and coverage analysis end-to-endApply and grow SSN (Simultaneous Switching Noise) test methodologies – a newer, high-value area where not everyone has experienceWhat We're Looking ForLead-level DFT experience with proven ownership on complex SoCsDeep understanding of scan, memory BIST, ATPG, and coverage metricsHands-on experience with Siemens Tessent (or equivalent)
Ability to collaborate early with RTL,
physical design,
and STA teamsComfortable setting direction—not just following itWhy EximeitasWork on real,challenging silicon problems—not checkbox DTFHigh-impact role with technical influence from day oneCollaborative,DFT
and
test strategies in advanced nodesInterested or know someone perfect for this role?Apply directly or reach out with referrals/questions:Job description
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