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    ASIC verification engineer - Austin, United States - Wipro

    Wipro
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    Description
    1. Hands-on experience in SV/UVM.
    2. Must be able to independently own and drive the verification of a block/SS with minimal guidance and support
    3. Extensive experience in IP/sub-system and/or SoC level verification based on SV/UVM
    4. Experience in Tesplan and TB development, execution of testplan using high quality constrained random UVM tests to hit coverage goals on time
    5. Should be good with debug and exposed to all aspects of verification flow including Gatesims
    6. Experience with verification of ARM/RISC-V based CPU sub-systems or SoCs
    7. Expertise of protocols like AMBA, PCIe, DDR, HBM, UCIe, USB, Ethernet
    8. Experience in EDA tools and scripting (Python, TCL, Perl, Shell), revision control Hg, Git


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