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    ASIC/FPGA Design Engineer - Orlando, United States - NESCO Inc

    NESCO Inc
    NESCO Inc Orlando, United States

    2 weeks ago

    Default job background
    Description
    *** is seeking for an experience FPGA design and verification engineer, candidate must have both design and verification experience including hardware integration.


    Job Description:

    Develops, designs, verifies, and documents Field Programmable Gate Arrays (FPGA) development.
    Determines architecture design, logic design, and system simulation.

    Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization.

    Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results.
    Support Circuit card designer with trade studies.
    Develop and release design requirement specifications for product.

    Support of production environment in debugging and troubleshooting FPGA related issues in a production environment will be a critical component of this particular role.


    Required Experience:

    Strong understanding and experience in FPGA design and verification is a requirement.
    Candidate must be familiar with UVM and system verilog. High Level Synthesis (HLS) design experience is a plus.
    Candidate must have experience integrating FPGA solution on hardware and design validation including simulation validation.

    Active Secret Clearance is preferred. Candidates must have ability to obtain Interim Secret Clearance.

    Comments for Suppliers:
    PLEASE DO NOT SUBMIT ANY CANDIDATES THAT WERE SUBMITTED OR DECLINED (FOR ANY REASON) TO REQUEST #14184.


    Required Experience:

    Strong understanding and experience in FPGA design and verification is a must.
    Candidate must be familiar with UVM and system verilog.
    Candidate must have experience integrating FPGA solution on hardware and design validation including simulation validation.
    Matlab / Simulink FPGA design (HDLCoder / SystemGenerator) or High Level Synthesis (HLS) design experience is a plus.

    Active Secret Clearance is preferred. Candidates must have ability to obtain Interim Secret Clearance.

    Nesco Resource provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws.
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