- Working closely with PHY digital and mixed signal architects to figure out the details of FW functions and sequences.
- Involvement during post-silicon testing and validation to identify any FW and HW related functionality and performance issues and implement any necessary FW improvements to address these issues.
- Interaction with Product Engineering, System Validation and Design team to debug IP issues in the field and provide hot fixes.
- Create and maintain comprehensive documentation related to firmware design, development, bug fixes and compliance testing.
- Support of Validation team during electrical and system characterization.
- Support of Product Engineering team during customer deployment of the IP.
- Solid programming knowledge in C/C and Python
- Knowledge in mixed signal circuit design and digital signal processing techniques
- Experience with digital verification environment and tools is a plus
- BSc or MSc in Electrical Engineering
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Firmware Principal Engineer - San Jose, CA, United States - Cadence Design Systems, Inc.
Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
The Future of Intellectual Property is HereElectronic innovation is everywhere, from smart sensors to smart cities, and it is transforming the way people work, live, and play.
Cadence is excited to play a role in this innovation, not only as a world leader in electronic design automation (EDA) for over 25 years, but also as a driving force in the advancement of intellectual property (IP).
As you use more IP to fortify your SoCs with new functionalities, we can help you reduce the complexity and risk inherent in designing for smart technology while meeting your performance, area, and power (PPA) requirements.
Cadence provides an open IP platform and IP Factory approach so you can design, customize, and verify IP and IP subsystems to fit your SoCs in ways that werent possible before.
Quality is Integral to What We Do, Not an AfterthoughtCadence has amassed thousands of IP tape outs, and our IP solutions are in use by many of the worlds leading semiconductor and systems companies.
The Cadence quality assurance program is based on clear, documented policies and reproducible procedures that begin in product definition and development and extend through testing and release to ongoing maintenance and support.
Our procedures include specification and maintenance of appropriately detailed product definitions and test/release plans for every Cadence product.The successful candidate will ideally be a highly motivated self-starter who is able to work independently to complete assigned tasks and can also contribute to project leadership.
It is expected that the candidate will contribute during all phases of firmware development for high speed SERDES from architecture development to implementation, verification, testing and customer deployment.
Contribution during firmware architecture development and implementation of the defined firmware features.Help to build system level prototype control software to develop/validate adaptation, equalization, and control algorithms for high speed SERDES.
Our benefits programs include:
paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
Help us solve what others cant.We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.
Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.
?All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
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