- Verifying complex SoCs through simulation of register-transfer level (RTL) and gate level designs using industry standard tools and processes
- Collaborate closely with design and other verification engineers to develop and implement verification test plans and drive verification methodology work
- Develop constrained-random verification test environment using Verilog/System Verilog, UVM and C programming, including testbenches, checkers, monitors, drivers and and other testbench components
- Use problem solving skills to debug failing simulations and create test vectors and testing scenarios to exhaustively exercise a design
- Drive and analyze test coverage metrics
- Utilizes technical leadership abilities and sound communication skills to drive and manage verification project deliverables
- Knowledge of advance digital design, CPU design and computer architecture
- Must have experience with industry standard simulators such as Cadence Incisive, Synopsys VCS or Questasim
- Advance knowledge of behavioral coding in verilog and SystemVerilog
- Experience in standard verification methodology flows, including developing test plans, building testbenches and generating test cases
- Experience with ARM microprocessor and AMBA bus architectures
- Experience with industry standard interfaces such ethernet and PCIe
- Experience developing and analyzing coverage metrics
- Great problem solving and critical thinking skills
- Good written and verbal communication skills
- Self-starter, goal oriented and a team player
- Experience with constrained-random verification test environments using Verilog/SystemVerilog and UVM
- Experience using Cadence, Synopsys or Mentor VIP
- Experience programming in C or C++ and in scripting using Python, PERL or Bash
- Experience in performance verification
- Experience using formal verification tools and processes
- Experience in gate-level verification
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Staff Design Verification Engineer - Rochester, United States - Marvell Semiconductor
Description
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform.As part of the Infrastructure Processor unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers' specifications whether they're a major telecom organization or automotive company, etc.
What You Can Expect
In this role you will:
What We're Looking For
Bachelor's degree in Computer Science, Electrical Engineering or related fields and 3-5 years of related professional experience Or Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with
Preferred Qualifications
#LI-TM1
Expected Base Pay Range (USD)
101, ,850, $ per annumThe successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at
