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    Principal System Control Plane Design Engineer - San Jose, United States - Cadence Design Systems, Inc.

    Cadence Design Systems, Inc.
    Cadence Design Systems, Inc. San Jose, United States

    3 weeks ago

    Default job background
    Full time
    Description

    At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

    Hardware emulator is a complex embedded system used by many SoC, software and system design companies to validate their multi-billion designs prior to, during and after the chip released to fabrication. Since the emulation platform is used by many engineers for time sensitive work, it must be available 24-x7 to support the development.

    Cadence is the leader in hardware emulation and prototyping technology. System Engineering (SE) team is looking for a system control plane design engineer to help develop the next generation products and also to enhance existing platforms.

    Key responsibilities

  • Collaborate with hw/sw/system architects to design and implement the next generation platform using PCIe/IB/RoCE/Ethernet technology.
  • Define system control SW and HW, boot sequence and time allocation in each of the major steps.
  • Model and analyze the various system faults and recovery time and their impacts on system RAS.
  • Define and develop any necessary control plane monitoring tools.
  • Define and drive integration tests to confirm the robustness in the control plane implementation.
  • Transfer design, tools and test knowledge to manufacturing and field installation teams. Review, replicate, and respond to customer issues. Perform analysis of logs from customer runs. Debug and isolate system-level issues down to various subsystems.

    • Requirements

  • Bachelors in Computer Science or Electrical Engineering with a minimum of 7 years of related experience, or Masters with a minimum of 5 years of related experience, or PhD with a minimum of 1 years of related experience
  • Must have in-depth large system control plane architecture development and understanding.
  • Must have strong and hands on experience with one or more PCIe/IB/RoCE/Ethernet HW and/or SW development experience including troubleshooting and resolving HW/SW system issues in the lab.
  • Must have architecture and design experience with global clocking/synchronization, Ethernet, memory, multi-processor, optical network PMA/PCS, PCIe, AC/DC power distribution, medium to large scale resilience software development.
  • Fluent in Linux serve system architecture and deployment, and scalability in data-center-level is a plus
  • Experience with defining system RAS specification and test plans.
  • Experience in performance, fault, recovery analysis and debugging issues for large scale system.

    • We're doing work that matters. Help us solve what others can't.

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