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    Lead Microfabrication Process Engineer - Oakland, United States - UC San Diego

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    Description
    Lead Microfabrication Process Engineer

    Job Description


    Extended Deadline:
    Mon 4/15/2024

    UC San Diego values equity, diversity, and inclusion.

    If you are interested in being part of our team, possess the needed licensure and certifications, and feel that you have most of the qualifications and/or transferable skills for a job opening, we strongly encourage you to apply.

    UCSD Layoff from Career Appointment : Apply by 11/29/23 for consideration with preference for rehire. All layoff applicants should contact their Employment Advisor.

    Special Selection Applicants :
    Apply by 12/11/23. Eligible Special Selection clients should contact their Disability Counselor for assistance.
    Job posting will remain open until a suitable candidate has been identified.

    DESCRIPTION


    Working closely with faculty members, Nano3 staff members, postdoctoral researchers, and other team members, the lead process engineer's major responsibilities are to develop advanced micro- and nano- fabrication techniques and processes for the realizations of heterogeneous 2.5D/3D integration and for enhanced CMOS for 5G/6G applications.

    Examples of heterogeneous 2.5D/3D integration techniques and processes to be developed include chip stacking, vias fabrication (TSV), 3D multi-wafers, multi-layers integration, wafer bonding and pick-and-place.

    Examples of enhanced CMOS techniques and processes include depositions of heterogeneous materials, such as, quantum dots, metals, oxides, 2D material, magnetic materials, piezoelectric materials, on partially processed CMOS wafers or devices.

    The process engineer will also work closely with the EDA (Electronic Design Automation) provider to demonstrate the process capabilities and fabricate device prototypes using techniques such as photo- and electron-beam patterning, wet/dry-etching, materials deposition, metrology, materials analysis, soft-lithography and more.

    The process engineer will also be responsible for understanding and executing the process development strategic plans, refining the techniques, documenting all the process details, and transferring the techniques to different stakeholders.

    Using skills as a seasoned, experienced engineering professional in a specialized engineering field on a major training and / or research effort, the process engineer will:

    (1) Develops and characterizes multiple fabrication/characterization processes for heterogeneous 2.5D/3D integration and enhanced CMOS. Fabricate micro/nano-structured devices for demonstrations of the above mentioned processes.

    Nanofabrication processes to be developed, includes but not limited to:
    optical and electron-beam lithography, etching, materials deposition, imprint lithography, hot-embossing, micro- machining, molding, bonding, and metrology.
    (2) Develops innovative technologies for realizations and optimizations of the above mentioned processes, and transfer of such technologies to stakeholders, industrial Fab representatives, or users with diverse backgrounds.
    (3) Develops protocols with EDA providers to facilitate the automation of process monitoring and optimizations.
    (4) Documents all process details in a professional way that can be transferred to different stakeholders and industrial partners.
    (5) Provides training to users with diverse backgrounds and improves educational and outreach programs where users are trained in micro/nano fabrication to design, fabricate and test micro-meter scale devices across many areas of the microtechnology.
    (6) Designs and develops novel capabilities of existing and new nano/micro-fabrication equipment. Operate and maintain Nano3's existing fabrication equipment, install and operate future nano/micro-fabrication and characterization equipment, and new user training on existing and future nano/micro-fabrication equipment.
    (7) Serves as technical resource and liaison to researchers, staff and industry partners for development of designs/experiments, proactively finding solutions to complex problems. Additional tasks include provision of direct services to internal and external users of the facility, including, but not limited to, fabrication of micro/nano-dimensional devices, electron-beam lithography patterning, nano/micro-molds preparation, and equivalent responsibilities as future equipment becomes available.
    Responsible for the Day-to-day operations and fabrication.

    Work has considerable impact on projects and ability to meet unit/department goals and is reviewed in terms of meeting objectives.


    QUALIFICATIONS


    Master's degree in an engineering field with six (6) years of relevant experience in micro/nano fabrication process development, or an equivalent combination of education/experience/training required.


    Strong demonstrated knowledge of and experience in engineering principles and methods to independently perform the full range of engineering professional design work.


    Demonstrated working knowledge of analysis techniques, including but not limited to: Scanning electron microscopy, Scanning probe microscopy, Contact profilometry, 3-D optical profilometry, Film stress measurement, ellipsometry, interferometric microscopy.


    Strong demonstrated working knowledge and hands-on experience in a variety of micro/nano fabrication techniques, including but not limited to: Photolithography, Resist processing, Wet-etching, Dry-etching (reactive ion etching, inductively couple plasma etching), Plasma Enhanced chemical vapor deposition (PECVD), Magnetron Sputtering, Thermal/Electron-beam evaporation, Electro- forming, Bonding, Chemical Processing.

    Demonstrated ability to lay out a device process flow and then fabricate it into a device prototype. Working knowledge of electron-beam lithography. Extensive knowledge of the fundamentals of materials science, including 2D materials.

    Demonstrated ability to lead educational micro-/nanofabrication development programs, including laboratories and lectures, among a diverse set of users. Ability to create, improve, and prepare materials needed for laboratories, lectures, and other activities.

    Demonstrated strong computer skills (i.e. word, excel, powerpoint, etc.) to perform teaching tasks, document process data, and to communicate with users. Ability to create professional reports, lab manuals, instruction manuals, graphs, charts, and spreadsheets

    Advanced knowledge associated with the planning, development, and fabrication of engineering systems.

    Excellent knowledge of regulations and requirements for laboratory safety, including methods for handling, cleaning and disposal of waste.

    Advanced knowledge of specialized design work as well as the overall field.

    Strong creativity and problem solving abilities to apply principles, practices and procedures within discipline to complete difficult assignments.

    Strong project management skills needed to assume responsibility for accomplishment of research objectives.

    Advanced communication skills, both written and verbal, to convey complex information in a clear and concise manner.

    Advanced interpersonal and presentation skills.

    Ability to work in a highly collaborative manner; readily assess complex challenges and barriers and recommend effective resolutions.

    Demonstrated ability to lead, motivate and influence others.


    SPECIAL CONDITIONS
    Job offer is contingent upon satisfactory clearance based on Background Check results.
    Pay Transparency Act

    Annual Full Pay Range:
    $101,200 - $192,200 (will be prorated if the appointment percentage is less than 100%)

    Hourly Equivalent:
    $ $92.05


    Factors in determining the appropriate compensation for a role include experience, skills, knowledge, abilities, education, licensure and certifications, and other business and organizational needs.

    The Hiring Pay Scale referenced in the job posting is the budgeted salary or hourly range that the University reasonably expects to pay for this position.

    The Annual Full Pay Range may be broader than what the University anticipates to pay for this position, based on internal equity, budget, and collective bargaining agreements (when applicable).


    If employed by the University of California, you will be required to comply with our Policy on Vaccination Programs, which may be amended or revised from time to time.

    Federal, state, or local public health directives may impose additional requirements.


    To foster the best possible working and learning environment, UC San Diego strives to cultivate a rich and diverse environment, inclusive and supportive of all students, faculty, staff and visitors.

    For more information, please visit .
    The University of California is an Equal Opportunity/Affirmative Action Employer.

    All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, age, protected veteran status, gender identity or sexual orientation.

    For the complete University of California nondiscrimination and affirmative action policy see:

    UC San Diego is a smoke and tobacco free environment. Please visit

    for more information.
    Application Instructions

    Please click on the link below to apply for this position. A new window will open and direct you to apply at our corporate careers page. We look forward to hearing from you

    Payroll Title:
    RSCH AND DEV ENGR 4


    Department:

    QUALCOMM INSTITUTE
    Hiring Pay Scale

    $110,000 - $129,000 / Year


    Worksite:
    Campus


    Appointment Type:
    Career

    Appointment Percent:

    100%


    Union:
    Uncovered

    Total Openings:

    1


    Work Schedule:
    Days, 8 hrs/day

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    4/8/2024

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