Jobs

    Senior PIC Layout Engineer - California, United States - Quantum Futures

    Quantum Futures
    Quantum Futures California, United States

    4 weeks ago

    Default job background
    Description

    Senior Photonic Integrated Circuits Layout Engineer - ONSITE

    Quantum Futures has partnered with a global silicon photonics company; to help our clients create a team of scientists to develop the next generation solutions for interconnects, sensing, and computing applications. They are searching for a senior PIC layout engineer to help develop photonic PDK for the next generation of optical transceivers.

    Your tasks:

    • The development of photonic components for PDK, including LVS, DRC, Verilog modelling and PCell programming.
    • Create the layout and floor plans of Silicon PIC devices.
    • Simulate PIC devices on a Silicon Photonic SOI platform.
    • Model the building-block behaviour for system-level simulations.

    Your profile:

    • PhD in relevant field - I.E., integrated photonics, electro-engineering, etc.
    • 4+ years of industrial experience in integrated photonics.
    • Chip-level photonic design principles for DFM-maturity
    • Experience from design to tape out for PIC devices.
    • You have tested, defined, and specified photonic building blocks using Layout v Schematic (LVS) and Design Rule Checks (DRC) routines.
    • Strong knowledge of eigenmode expansion, TCAD simulations, and FDTD methods.
    • In-depth understanding of Cadence.
    • Professional proficiency in English

    Candidates must have full right to work in US without sponsorship to be considered for this role.

    If you're interested, please apply below or contact Lewis Cross at -

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