- Setup DDR4/5 pre/post-silicon validation environment, boards, test equipment.
- Contribute towards SI/PI related debug & testing, IO tuning, compliance testing and PVT characterization.
- Develop software routines for DDR PHY/DRAM initialization / training routines, equalization & IO tuning, SI/PI related optimization, etc.
- Validate and characterize the silicon on server board system and execute data collection, AVL (Approved vendor list) test, DDR DIMM interoperability test.
- Be the "point person" for engaging directly with IP and DDR vendors and customers. To help identify issues, understand concerns and offer solutions.
- Involve writing test plans, executing test plan in post silicon environments, perform debugging and failure analysis alongside the Silicon and Board design engineers to identify and fix any hardware bugs before going into production.
- 3+ years of post-silicon validation experience
- 2+ years of DDR5 Driver experience.
- Exposer to DRAM initialization / Training.
- 1+ years of Input/Output (I/O), Signal Integrity (SI) tuning and Margin Optimization
- Expert in SI integrity measurements, equalization features validation and related tuning.
- 1 year Analog Engineering/Validation know-how.
- Exposer dealing directly with IP and DDR vendors/customers.
- Customer-focused skills as a Hardware Application Engineer highly-desirable.
- Minimum of 2 year of experience in developing and testing DDR sub systems
- Working experience with DDR4/5 controller and PHY, JEDEC and DFI specifications
- Microcontroller & Embedded Systems Programming Experience in C/C++
- Deep understanding of Server boot flow and specifically DDR initialization process.
- Comfortable with the lab environment, using DMM, high speed oscilloscopes, compliance, and similar tools.
- Knowledge of High-speed analog and VLSI design, transmission-line theory.
- Debug skills at both SoC and system level.
- Strengths in script languages such as Perl or Python, Linux shell script.
- Strong communication and interpersonal skills are required along with the ability to work in a dynamic, product oriented, distributed team.
- Must be a self-starting team player with excellent communication skills who can work with minimal guidance.
- Office has panoramic views of Silicon Valley
- Garage parking
- Gym and café on campus
- Healthy snacks and drinks
- Standing desks
- Ping-pong
- Unlimited Flextime
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Ampere Santa Clara, United StatesThe Role: · Ampere Computing is seeking a Customer-Focused Post-Silicon Validation Engineer- DDR / Memory Tuning to join a talented and experienced team to validate server class products for memory sub-system that power Cloud, Enterprise, and Data Center Ampere's competitive edg ...
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Ampere Santa Clara, United States· The Role: · Ampere Computing is seeking a Customer-Focused Post-Silicon Validation Engineer- DDR / Memory Tuning to join a talented and experienced team to validate server class products for memory sub-system that power Cloud, Enterprise, and Data Center Ampere's competitive ...
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Customer-Focused Silicon Validation Engineer- DDR/Memory Tuning - Santa Clara, United States - Ampere
Description
Description
The Role:
Ampere Computing is seeking a Customer-Focused Post-Silicon Validation Engineer- DDR / Memory Tuning to join a talented and experienced team to validate server class products for memory sub-system that power Cloud, Enterprise, and Data Center Ampere's competitive edge depends on building CPUs optimized for high performance, low power with cutting edge technology. It poses a unique challenge, gives us opportunities to innovate, and makes our jobs fun.
Our team has a start-up attitude: plenty of opportunities to learn and grow and plenty of room for innovation. We also have great mentors for you in the field of custom processor/controller/ Physical Layer (PHY) architecture, mix signal analog-digital designs, server system design, virtual and cloud software frameworks, product development, etc. to name a few. They are industry veteran architects and designers who know how to build and deliver leadership products. Come here to learn, add value, and be part of what comes next in the semiconductor industry.
What the Team wants you to know:
You will learn the Ampere's processor micro-architecture, core & Mesh, DDR5 memory, PCIe IO interface, system RAS, etc. features. You will contribute to validation of Ampere's DDR5 memory subsystem, PHY, Equalization, IO characterization, DDR training routines, memory controller RAS & performance in both emulation and post-silicon environments. Role may include but not limited to: Engaging with and providing customer support with IP & DDR vendors and customers, Writing and debugging tests for Firmware level bare metal environment, BIOS initialization sequence, hypervisors, OS level applications and benchmarks.
What you'll do:
What you "must" already bring in your skill set:
Preferred Qualifications:
Education:
Bachelor's degree (Master's preferred) in Electrical Engineering, Computer Engineering or a related technical field.
Perks in Santa Clara
We are an inclusive and equal opportunity employer and welcome applicants from all backgrounds. All applicants will receive consideration for employment without regard to age, race, color, religion, sex, national origin, disability status, protected veteran status, or any other characteristic protected by law.
