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    DFT Engineer - San Francisco, United States - LaBine and Associates

    LaBine and Associates
    LaBine and Associates San Francisco, United States

    1 day ago

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    Description

    Job Description

    Job Description

    Job Description:

    One of our leading client develops and delivers ASIC and SoC solutions to customers worldwide in some of the hottest technology areas. If you are a hands-on DFT Engineer with strong tools and testing skills and can be client facing, we'd like to speak with you.

    Qualifications:

    Minimum of 8+ years hands-on work experience in ASIC DFT design. Experience in an SoC product development organization or in an ASIC vendor company along with customer facing experience preferable.

    · BS/MS in Electrical Engineering, Computer Science, or related field

    · Experience with Industry standard DFT/ATPG EDA tools like Tessent/TestMax/Modus. Experience with simulators and waveform debug tools.

    · Strong knowledge of DFT methodologies, industrial standards, and practices

    · Strong working knowledge of Chip design, Verilog/System Verilog, and design verification

    · Experience with STA tools like Primetime, SDF generation and Gate-level simulations

    · Understanding and expert handling of Verilog HDL based Netlists, design libraries and Scripting (Perl/Tcl)

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