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    SoC Modeling ASIC Engineer - Sunnyvale, United States - META

    META
    META Sunnyvale, United States

    1 week ago

    Meta background
    Description

    Reality Labs focuses on delivering Meta's vision through Augmented Reality (AR) and Virtual Reality (VR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Reality Labs Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR/VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, to firmware, and algorithms. We are seeking an SoC Modeling ASIC Engineer to support C++/Python modeling and software interfaces of ML, computer vision and other IPs implemented in our SoC pre-silicon platforms containing dedicated hardware accelerators (HWA). The successful candidate will be part of a team that includes algorithm, software, firmware, pre-silicon platforms, and emulation experts. The ideal candidate will understand SoC architecture, ML and CV accelerators, software interface, and mapping software pipelines to the dedicated hardware accelerators.

    SoC Modeling ASIC Engineer Responsibilities

    • Analyze the software pipelines and building Infra and tooling to automatically map them to the hardware accelerators
    • Work with architecture team to understand the SoC and IP architecture and develop methodology for enabling sw/hw co-design using presilicon platforms
    • Use of C/C++ models for architectural modeling, algorithm benchmarking, and mapping software to the hardware accelerators using pre-silicon platforms
    • Map AR workloads to heterogeneous ASICs that contain multiple different programmable processors and hardware accelerators. Perform detailed calculations to specify computation throughput, memory bandwidth and latency using pre-silicon models
    • Collaborate with cross functional teams working on RTL design, Design Verification, Firmware/Software development, to deliver first pass functional silicon on an aggressive schedule
    Minimum Qualifications
    • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
    • Demonstrated knowledge and experience in machine learning and computer vision hardware and software
    • Demonstrated experience in mapping software use cases to hardware accelerators and custom silicon
    • In-depth understanding of system-on-chip (SoC) architecture, SoC memory hierarchy, and ASIC design flow
    • Proficient programming skills in C++ and Python, with the experience to model hardware using software programming languages
    Preferred Qualifications
    • Hands-on experience with PyTorch and mapping machine learning models to hardware accelerators in FPGA or virtual prototypes
    • Proficiency in performance modeling using SystemC and analyzing the performance of machine learning and computer vision pipelines using pre-silicon models
    • Experience in building tool flows and infrastructure for mapping machine learning models to ASICs and custom SoCs
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