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Elect Design and Analy Engr 3
3 weeks ago
The Judge Group El Segundo, CA, United StatesOur client is currently seeking a Elect Design and Analy Engr 3 · Duration: 6 months (Manager highly likely to consider extending contract or converting the right candidate in future.) · Work Location: El Segundo CA 90245 · OnsiteJob Description: · Title: ASIC/FPGA Design Verific ...
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Elect Design and Analy Engr 3
3 weeks ago
Apollo Professional Solutions El Segundo, United StatesASIC/FPGA Design Verification Engineer · Location: El Segundo, CA · Hourly rate: $ $66.00 · Contractor benefits: Medical, Vision, Dental, 401k · Candidate must have UVM experience. · • Create UVM simulation plan from design specification. · • Create or modify UVC, Score Board, M ...
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6B1DI3-Elect Design and Analy Engr 3
3 weeks ago
Experis El Segundo, United StatesTitle: Elect Design and Analy Engr 3 · Location: El Segundo CA · Contract · Create UVM simulation plan from design specification. Create or modify UVC, Score Board, Monitor, and test cases. · Verify until functional coverage and code coverage meet project threshold. Document ...
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6B1DI3-Elect Design and Analy Engr 3
4 days ago
Saxon Global El Segundo, United StatesJob Description: Title: ASIC/FPGA Design Verification Engineer with UVM Experience · PLEASE DO NOT SUBMIT THE SAME CANDIDATES TO THIS REQUEST AS 59531 or 61152 · Create UVM simulation plan from design specification. Create or modify UVC, Score Board, Monitor, and test cases. Ve ...
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6B1DI3-Elect Design and Analy Engr 3
3 weeks ago
Indotronix International Corporation El Segundo, United StatesIndotronix is seeking a Onsite Job - ASIC/FPGA Design Verification Level 3 for a Job Opportunity in El Segundo,California · Job Description : · Required Skill Set : · •5+ years of experience · •1-2 years of UVM tool · •Cadence Xcelium verification tool · Education Qualificat ...
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Electrical Design
2 weeks ago
virtusa El Segundo, United States**Job Title: Elect Design and Analy Engr/ASIC/FPGA Design Verification Engineer** · **Location: El Segundo, CA** · **Duration: 6 Months** · - Create UVM simulation plan from design specification. Create or modify UVC, Score Board, Monitor, and test cases. Verify until functional ...
6B1DI3-Elect Design and Analy Engr 3 - El Segundo, United States - LanceSoft
Description
Job Description:
Title: ASIC/FPGA Design Verification Engineer with UVM Experience
PLEASE DO NOT SUBMIT THE SAME CANDIDATES TO THIS REQUEST AS 59531 or 61152
Create UVM simulation plan from design specification. Create or modify UVC, Score Board, Monitor, and test cases. Verify until functional coverage and code coverage meet project threshold. Document results.