Sr. Engineer, Post-silicon Validation - San Jose, CA

We are seeking an experienced Post-Silicon Debug engineer to lead silicon bring-up and failure analysis for advanced SoC programs. · Lead post-silicon debug across functional and stress modes to root-cause silicon failures · Perform shmoo analysis, voltage/frequency margining, an ...

We are seeking an experienced Post-Silicon Debug engineer to lead silicon bring-up and failure analysis for advanced SoC programs. · Key Responsibilities: · Lead post-silicon debug across functional and stress modes to root-cause silicon failures · Perform shmoo analysis, voltage ...

We are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up, validating and characterizing ASICs from first silicon through the production ramp. · ...

We are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up, validating, and characterizing ASICs from first silicon through the production ramp. · This role is crucial in ensurin ...

About Etched · Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like ...

Lead silicon bring-up post-silicon validation and deep debug of next-generation AI accelerator chiplets including validation of high-speed interfaces such as PCIe Gen5 LPDDR5 and die-to-die interconnects. · ...

The Post Silicon Validation Engineer will be responsible for validating SoC platforms after silicon bring-up. · Perform power and performance measurements across multiple real-world use cases · ...

Post Silicon Validation Engineering for Wipro Limited. Requirements include board bring up knowledge, HW troubleshooting skills and board testing as per the test plan. Must have familiarity of working in lab environment in electrical measurements of different IO interfaces and us ...

Lead silicon bring-up post-silicon validation and deep debug of next-generation AI accelerator chiplets including validation of high-speed interfaces such as PCIe Gen5 LPDDR5 and die-to-die interconnects. · ...

Lead silicon bring-up post-silicon validation and deep debug of next-generation AI accelerator chiplets including validation of high-speed interfaces such as PCIe Gen5 LPDDR5 and die-to-die interconnects. · ...

This is a senior-level engineering position focused on the post-silicon validation of memory subsystems within System-on-Chip (SoC) products. · Taking lead responsibility for validating DDR memory subsystems (LPDDR4x, LPDDR5x) on multiple SoC platforms. · ...

Lead silicon bring-up and post-silicon validation of next-generation AI accelerator chiplets. · ...

We are seeking · Lead Post-Silicon Validation Engineer within the · GPU Engineering Team to help drive development of future GPUs be used in 3D graphics, deep learning, HPC and automotive markets. Make the choice to join our dynamic team today · NVIDIA has continuously reinvented ...

Altera is seeking a visionary Senior Director of Post-Silicon Validation to lead and drive all aspects of post-silicon validation across multiple product lines. · Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. · 10+ years of exper ...

Altera is seeking a visionary Senior Director of Post-Silicon Validation to lead and drive all aspects of post-silicon validation across multiple product lines. · Define and implement Altera's post-silicon validation strategy · Oversight responsibility for the full post-silicon v ...

This is a Post Silicon Validation Engineer role at LTTS Dell Offsite Centre in Santa Clara. · ...

Power & Perf measurements under various use case scenarios, associated debugs and analysis of DDR interface bring up and qualification activities, PVT qualification & debug of systems intended for testing HW-SW co-working stability. · ...

Lead SOC post silicon validation engineer position at Goldenpick Technologies LLC in San Jose CA. · ...

Key words: Power Measurement DAQ/DMM Function testing Oscilloscopes SoC Platforms Signal Integrity Excellent Python programming. · ...

We are seeking a Post-Silicon Validation Engineer with a strong interest in hands-on, lab-intensive hardware validation to support testing and debug of networking silicon. · Perform hands-on post-silicon electrical validation in lab environments for networking ASICs, and evaluati ...

Perform power and performance measurements under various use case scenarios associated debugs and analysis. · DDR interface bring up and qualification activities · PVT qualification & debug of systems (small and large sample size) intended for testing HW-SW co-working stability · ...