Post-Silicon Validation - Campbell, CA

We are seeking an experienced Post-Silicon Debug engineer to lead silicon bring-up and failure analysis for advanced SoC programs. · Lead post-silicon debug across functional and stress modes to root-cause silicon failures · Perform shmoo analysis, voltage/frequency margining, an ...

We are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up, validating, and characterizing ASICs from first silicon through the production ramp. · This role is crucial in ensurin ...

The Post Silicon Validation Engineer will be responsible for validating SoC platforms after silicon bring-up. · Perform power and performance measurements across multiple real-world use cases · ...

Lead silicon bring-up post-silicon validation and deep debug of next-generation AI accelerator chiplets including validation of high-speed interfaces such as PCIe Gen5 LPDDR5 and die-to-die interconnects. · ...

Lead silicon bring-up post-silicon validation and deep debug of next-generation AI accelerator chiplets including validation of high-speed interfaces such as PCIe Gen5 LPDDR5 and die-to-die interconnects. · ...

About Etched · Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like ...

This is a senior-level engineering position focused on the post-silicon validation of memory subsystems within System-on-Chip (SoC) products. · Taking lead responsibility for validating DDR memory subsystems (LPDDR4x, LPDDR5x) on multiple SoC platforms. · ...

Post Silicon Validation Engineering for Wipro Limited. Requirements include board bring up knowledge, HW troubleshooting skills and board testing as per the test plan. Must have familiarity of working in lab environment in electrical measurements of different IO interfaces and us ...

Lead silicon bring-up and post-silicon validation of next-generation AI accelerator chiplets. · ...

Lead silicon bring-up post-silicon validation and deep debug of next-generation AI accelerator chiplets including validation of high-speed interfaces such as PCIe Gen5 LPDDR5 and die-to-die interconnects. · ...

We are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up, validating and characterizing ASICs from first silicon through the production ramp. · ...

We are looking for a highly skilled Post-Silicon Debug Engineer to lead silicon bring-up and failure analysis efforts in a fast-paced, collaborative environment. · ...

Develop and test C/C++ based embedded software and firmware for ARM CPU's in pre-silicon and post-silicon setups. · ...

Develops C/C++ Bare-metal/Firmware/Software tests/apps targeting ARM CPU's/DSP in Pre-Silicon & Post-Silicon setups Work closely with members of System Validation Software Firmware Hardware teams to complete execution of pre-silicon/post-silicon test plan. · ...

This is a job for Post Silicon Validation Engineer in Santa Clara. The engineer will be responsible for power & perf measurements under various use case scenarios and associated debugs and analysis. They also need to perform DDR interface bring up and qualification activities, PV ...

Perform power and performance measurements under various use case scenarios associated debugs and analysis. · DDR interface bring up and qualification activities · PVT qualification & debug of systems (small and large sample size) intended for testing HW-SW co-working stability · ...

This is a Post Silicon Validation Engineer role at LTTS Dell Offsite Centre in Santa Clara. · ...

We are seeking · Lead Post-Silicon Validation Engineer within the · GPU Engineering Team to help drive development of future GPUs be used in 3D graphics, deep learning, HPC and automotive markets. Make the choice to join our dynamic team today · NVIDIA has continuously reinvented ...

Power & Perf measurements under various use case scenarios, associated debugs and analysis of DDR interface bring up and qualification activities, PVT qualification & debug of systems intended for testing HW-SW co-working stability. · ...

Key words: Power Measurement DAQ/DMM Function testing Oscilloscopes SoC Platforms Signal Integrity Excellent Python programming. · ...