Linux & Firmware Developer – Custom CPU Post-Silicon Team - Santa Clara, CA

We are seeking an experienced Post-Silicon Debug engineer to lead silicon bring-up and failure analysis for advanced SoC programs. · Lead post-silicon debug across functional and stress modes to root-cause silicon failures · Perform shmoo analysis, voltage/frequency margining, an ...

Role Overview · Lead silicon bring-up, post-silicon validation, and deep debug of next-generation AI accelerator chiplets, including validation of high-speed interfaces such as PCIe Gen5, LPDDR5, and die-to-die interconnects. · Define and execute comprehensive validation and brin ...

We are seeking an experienced Post-Silicon Debug engineer to lead silicon bring-up and failure analysis for advanced SoC programs. · Key Responsibilities: · Lead post-silicon debug across functional and stress modes to root-cause silicon failures · Perform shmoo analysis, voltage ...

Lead silicon bring-up post-silicon validation and deep debug of next-generation AI accelerator chiplets including validation of high-speed interfaces such as PCIe Gen5 LPDDR5 and die-to-die interconnects. · ...

Lead silicon bring-up post-silicon validation and deep debug of next-generation AI accelerator chiplets including validation of high-speed interfaces such as PCIe Gen5 LPDDR5 and die-to-die interconnects. · ...

· Role Overview · Lead silicon bring-up, post-silicon validation, and deep debug of next-generation AI accelerator chiplets, including validation of high-speed interfaces such as PCIe Gen5, LPDDR5, and die-to-die interconnects. · Define and execute comprehensive validation and b ...

This is a senior-level engineering position focused on the post-silicon validation of memory subsystems within System-on-Chip (SoC) products. · Taking lead responsibility for validating DDR memory subsystems (LPDDR4x, LPDDR5x) on multiple SoC platforms. · ...

The Post Silicon Validation Engineer will be responsible for validating SoC platforms after silicon bring-up. · Perform power and performance measurements across multiple real-world use cases · ...

Post Silicon Validation Engineering for Wipro Limited. Requirements include board bring up knowledge, HW troubleshooting skills and board testing as per the test plan. Must have familiarity of working in lab environment in electrical measurements of different IO interfaces and us ...

We are seeking · Lead Post-Silicon Validation Engineer within the · GPU Engineering Team to help drive development of future GPUs be used in 3D graphics, deep learning, HPC and automotive markets. Make the choice to join our dynamic team today · NVIDIA has continuously reinvented ...

: · We are looking for an engineer who will work on power and performance measurements across multiple use-case scenarios, perform debugging, and conduct system analysis. The role involves DDR interface bring-up, system qualification, and validation of hardware-software interacti ...

Be part of a team that pushes boundaries developing custom silicon solutions powering Google s direct to consumer products You ll contribute to innovation behind products loved by millions worldwide Your expertise will shape next generation hardware experiences delivering unparal ...

Proto is accelerating the world's transition to an open economy with products that increase access and independence for everyone. We're building Bitkey a simple and safe self-custody bitcoin wallet that will put customers in control as well as hardware and software that will help ...

Power & Perf measurements under various use case scenarios, associated debugs and analysis of DDR interface bring up and qualification activities, PVT qualification & debug of systems intended for testing HW-SW co-working stability. · ...

· Minimum qualifications: · Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. · 8 years of experience in silicon architecture, design, validation, software, or product development. · Exper ...

This is a Post Silicon Validation Engineer role at LTTS Dell Offsite Centre in Santa Clara. · ...

This is a job for Post Silicon Validation Engineer in Santa Clara. The engineer will be responsible for power & perf measurements under various use case scenarios and associated debugs and analysis. They also need to perform DDR interface bring up and qualification activities, PV ...

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. · ...

Perform power and performance measurements under various use case scenarios associated debugs and analysis. · DDR interface bring up and qualification activities · PVT qualification & debug of systems (small and large sample size) intended for testing HW-SW co-working stability · ...

Description: · We are looking for an engineer who will work on power and performance measurements across multiple use-case scenarios, perform debugging, and conduct system analysis. The role involves DDR interface bring-up, system qualification, and validation of hardware-softwar ...

Key words: Power Measurement DAQ/DMM Function testing Oscilloscopes SoC Platforms Signal Integrity Excellent Python programming. · ...