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ASIC Failure Analysis Engineer
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Senior Failure Analysis Engineer
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ASIC Failure Analysis Engineer
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ASIC Failure Analysis Engineer
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Senior Failure Analysis Engineer - San Jose, United States - Theery
Description
The Senior Failure Analysis Engineer will perform power supply or system level failure analysis to support RMA and internal/external customer issues.
Job responsibilities include, but are not limited to, the following.
Debugging and functionality verification of AC/DC switching power supply modules in various topologies using our products will be an essential part of the job responsibility.
Perform fault isolation and defect analysis/ characterization on power IC's to identify root causes of product failures in reliability test, production test, and/or power supply applications.
Provide comprehensive technical reports to customers on findings from product/power supply failure investigations.
Visit customers as necessary to resolve customer satisfaction issues arising from any quality problems and/or customers' perceptions about our quality.
Provide support to customers in China and Taiwan on quality problem resolution to ensure customer satisfaction.
Responsibility will also include effective verbal and written communication. Such communication will require, but not be limited to providing convincing technical reports suitable for external customers.
Experience & Requirements:
Experience in failure analysis of power semiconductors, analog, and/or mixed signal IC devices.
Experience in Switch-mode Power Supply applications, and analog, and/or mixed signal integrated circuit devices.
Fluent verbal, read, and written communication skills in Mandarin is required.
Excellent English speaking, reading and technical writing skill is required.
Candidates with direct experience in customer interface on resolution of customer quality problems will be given special consideration.
Candidates with background and experience in automotive failure analysis/customer communication will be given special consideration.
Ability to interpret system level schematics, the IC level schematics, and IC layout of CMOS and bipolar devices is required.
Preferences will be given to candidates who have a thorough understanding of analog, mixed-signal, or power semiconductor operational characteristics and the ability to apply fault isolation techniques at chip level as well as PCB at power supply system level.
Education:
Must have B.S. degree in electrical engineering or equivalent technical discipline with minimum 5 years' experience.
MSEE or equivalent discipline with 3 years' working experience will be given preference.
Please apply here or send your updated resume directly to