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    Senior Principal Verification Engineer - Austin, United States - NXP Semiconductors N.V.

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    Description

    Role Summary:


    We are part of MCU/MPU Engineering, a central design organization within NXP, developing products for multiple business lines in Automotive, Internet of Things (IoT), Networking, and Radio Frequency products, with expertise in hardware engineering, including architecture, IP, and full SoC Design.

    MME's Digital IP team produces design solutions covering the very wide range of SoCs required by the business lines.

    The team is challenged to produce industry-leading solutions covering very cost-sensitive, low-power devices to highly integrated, high-performance, multi-cohort devices compliant with the latest automotive and industrial safety and security standards.


    Job Responsibility:
    Responsible for the pre-silicon verification of IP modules or, IP subsystems
    Responsible for defining and writing IP verification plans based on requirements documents (industry standards, product requirements, IP architecture and IP implementation specifications)

    Interface to HW, FW, and SW design teams, as well as to architecture and system engineering teams, to understand functionality and application of the IP or subsystem.

    Responsible for executing verification plan according to the product specification and verification requirements defined by product architects.
    Responsible for architecting, developing, debugging and running UVM based verification environment for RTL simulation.
    Define and develop test cases in an appropriate verification framework.

    Create stimulus and assertions, run simulation, debug test cases on the design models (RTL, power aware RTL, gate level, FPGA, Emulation platform), run regression, collect and analyze code/functional coverage.

    Responsible for driving best practices and improving efficiencies across the IP teams.
    Mentoring a team of engineers


    Job Qualification:
    Degree in Electrical Engineering or Computer Science, with 10+ years of experience on IP/Sub-System Verification
    Proven experience in testbench design and development using UVM methodology for IP/Subsystem and SOC.
    Experience in Microcontroller and Microprocessor architecture, Interconnect, Cache Coherency.
    Experience in protocols like AHB/AXI/CHI, Memory (ROM, RAM, Flash, LPDDR/DDR3/4) and memory controllers.
    Advanced knowledge of Verilog, System Verilog, C/C++, Shell.
    Good knowledge in scripting like Perl, TCL or Python is a plus
    High proficiency in Metric Driven Verification concepts, functional and code coverage.
    Expertise in directed and constrained random methodologies.
    Good knowledge of formal verification methodologies and assertions.
    Experience with debugging of designs pre- and post-silicon, in simulation and on the bench.
    Excellent written and verbal communication skill.


    Job location:
    Austin, TX-this is a hybrid role with in-office 2-3 days a week.

    This is NOT a remote position, so relocation to Austin would be required if you are not a local candidate.

    More information about NXP in the United States...


    NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law.

    In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
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