CPU Gate Level Synthesis Engineer - Santa Clara, CA

We are seeking a highly skilled and experienced timing and Synthesis Engineer to join our team. · The ideal candidate will have a strong background in timing constraints development, synthesis, front-end implementation flows & methodologies for both SOC level and block level. · ...

This position is responsible for debugging timing/area/congestion issues and working with RTL & Physical designers to resolve them. · Debug the timing/area/congestion issues and work with RTL & Physical designers to resolve them. · Run Formal Verification checks between RTL and G ...

The RTL Synthesis Engineer will debug timing/area/congestion issues and work with RTL & Physical designers to resolve them. · ...

RTL Synthesis Engineer will debug timing/area/congestion issues and work with RTL & Physical designers to resolve them. · ...

Do you love building intelligent solutions that revolutionize chip design? · Design and develop GenAI-powered agentic applications for physical synthesis optimization and automation · Implement intelligent agents using Model Context Protocol (MCP) and other agentic frameworks to ...

+Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. · +Early RTL health assessment to detect potential timing/gate-depth issues and collaborating with the RTL u0026 physical design tea ...

As an SOC/ASIC Integration & Synthesis Engineer at Apple, you will be part of a dynamic group defining flows and methodologies for complex chip implementation. You will drive front-end integration activities, work on methodology improvements, low power design, RTL integration and ...

We are searching for a talented engineer to join our exciting team of problem solvers as an SOC/ASIC Integration & Synthesis Engineer. · Drive all front-end integration activities like Integration, Synthesis, UPF, · Logical Equivalence, ECO etc. · Work closely on methodology impr ...

We're seeking an experienced Frontend Synthesis/STA Engineer to join our team. · Design and implement digital circuits using Verilog or VHDL. · Perform synthesis and optimization of digital designs. · Conduct static timing analysis (STA) to ensure design meets timing requirements ...

Apple is looking for a hardworking engineer for our CPU Gate Level Synthesis role to assess and optimize design quality. · ...

Cadence Design Systems is looking for a highly motivated software engineer to work as a member of the R&D staff on Cadence's Genus Synthesis Solution product. · Proficient in C/C++ · Excellent programming and software engineering skills · Experience with UNIX and/or LINUX platfor ...

Cadence Design Systems is looking for a highly motivated software engineer to work as a member of the R&D staff on Cadence's Genus Synthesis Solution product. · We're doing work that matters. Help us solve what others can't. · ...

We are searching for a talented engineer to join our exciting team of problem solvers. · As an SOC/ASIC Integration u0026 Synthesis Engineer, you will have responsibilities spanning various aspects of SOC design:n- Drive all front-end integration activities like Integration, Synt ...

Qualcomm-Atheros, a.k.a. QCA is a wholly owned subsidiary of Qualcomm and a leading provider of wireless technologies for the mobile, networking, computing and consumer electronics markets. · Lead full-chip and sub-system level Static Timing Analysis (STA) and timing closure for ...

Physical design engineer supporting the full chip creation, · layout and final delivery of GDS-2. · ...

We're seeking research scientists/engineers to create breakthrough innovations in machine learning, computer vision, computer graphics, and related areas. · ...

We are now looking for a Senior ASIC Design Engineer. · NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's.This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging ...

+p>Job summary: We are now looking for a Senior ASIC Design Engineer that will implement high performance RTL to achieve design targets. · +QualificationsBachelors Degree or equivalent experience in Electrical Engineering. · 8+ years of meaningful work experience. · +Responsibili ...

We are now looking for an ASIC Design Engineer. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and artificial intelligence. · NVIDIA has crafted a team o ...

We are looking for a Senior ASIC Design Engineer to join our Switch Silicon team. As a Design Engineer at NVIDIA, you'll join a group of hardworking engineers developing the next generation, groundbreaking Switch Silicon chips. · ...