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We are seeking a hands-on ASIC Design Verification Lead to own verification execution for complex, high-performance networking silicon. · ...
Saratoga Full time2 weeks ago
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Position Overview · We are seeking a hands-on ASIC Design Verification Lead to own verification execution for complex, high-performance networking silicon. This role is a senior technical leadership position focused on driving verification strategy, infrastructure, and closure, w ...
Saratoga, CA2 days ago
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We are seeking a hands-on ASIC Design Verification Lead to own verification execution for complex high-performance networking silicon This role is a senior technical leadership position focused on driving verification strategy infrastructure and closure while remaining deeply inv ...
Saratoga, CA2 weeks ago
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We have an extraordinary opportunity for senior level engineers to drive and lead technical engagements between Apple and silicon suppliers working on groundbreaking technologies. · ...
Cupertino, CA2 months ago
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At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world's most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software ...
Santa Clara $86,900 - $203,800 (USD)1 week ago
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Your Profile / Required Qualifications · 12+ years of experience in SoC design and verification. · Strong expertise in UVM, UPF, and protocol VIPs. · Proven ability to define and execute verification strategies at SoC and subsystem levels. · Hands on experience with AMBA protocol ...
Sunnyvale6 days ago
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Role: Design Verification Lead · Work location: Sunnyvale onsite · 6+ months contract · We are seeking an experienced Design Verification Lead to drive SoC-level verification strategy, lead high performing teams, and ensure first time right silicon. This role requires deep techni ...
Sunnyvale6 days ago
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Quest Global is seeking talent for Lead Verification Engineer role. · Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios. · Create and enhance constrained-random verification environments u ...
Sunnyvale, CA2 months ago
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Role: Design Verification Lead · Work location: Sunnyvale onsite · 6+ months contract · We are seeking an experienced Design Verification Lead to drive SoC-level verification strategy, lead high performing teams, and ensure first time right silicon. This role requires deep techni ...
Sunnyvale, CA6 days ago
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We are looking for an adaptive, self-motivative design verification engineer to join our growing team. · ...
Santa Clara, CA1 month ago
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The Physical Verification Lead owns full-chip physical signoff for advanced-node designs at leading-edge foundries. · Demonstrated full-chip physical verification ownershipMultiple successful tapeouts at advanced process nodesDirect experience with TSMC signoff requirements · ...
San Francisco Bay Area3 weeks ago
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++The Verification Team Lead will work with design engineers and architects to define test plans, build infrastructure for automation verification, and develop reusable testbenches. · ...
San Jose, CA1 month ago
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Collaborate with design engineers and architects to define document and implement detailed test plans for the SoC design verification Build and maintain infrastructure environment for automation verification of SoC architecture function and performance Develop reusable testbench ...
San Jose1 month ago
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We are seeking a seasoned Lead Design Verification Engineer with expertise in verifying networking chip. · Ownership of verification strategy for one or more major IP blocks or subsystems within a complex networking ASIC. · Architect and implement testbenches using UVM/SystemVeri ...
Santa Clara1 month ago
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We are seeking a highly accomplished verification architect to define end‑to‑end verification strategies for complex IPs. · ...
US, California, Santa Clara $220,920 - $311,890 (USD) Full time1 month ago
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We are seeking an experienced Design Verification Lead to drive SoC-level verification strategy, lead high performing teams, and ensure first time right silicon. This role requires deep technical expertise, strong leadership, and the ability to influence cross functional teams wh ...
Sunnyvale6 days ago
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Job Details: · Job Description: · Job Description · Intel is seeking a highly technical Lead Design Verification Engineer for the Silicon Chassis team. In this senior technical leadership role, you will architect and deliver next-generation chassis IPs, designed to scale across ...
Santa Clara $220,920 - $311,890 (USD) Full time1 week ago
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Job Details: · Job Description: · Job Description Intel is seeking a highly technical Lead Design Verification Engineer for the Silicon Chassis team. In this senior technical leadership role, you will architect and deliver next-generation chassis IPs, designed to scale across mul ...
Santa Clara, CA1 week ago
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We are seeking an experienced Design Verification Lead to drive SoC-level verification strategy, lead high performing teams, and ensure first time right silicon. This role requires deep technical expertise, strong leadership, and the ability to influence cross functional teams wh ...
Sunnyvale, CA6 days ago
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About Marvell · Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. · At Marvell, you can aff ...
US-CA - Santa Clara4 days ago
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Job Details: · Job Description: · Job Description · Intel is seeking a highly technical Lead Design Verification Engineer for the Silicon Chassis team. In this senior technical leadership role, you will architect and deliver next-generation chassis IPs, designed to scale across ...
US, California, Santa Clara3 days ago
ASIC Design Verification Lead - Saratoga - Eridu AI
Description
ASIC Design Verification Lead
Eridu AI is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate training and inference for large-scale AI models. Today's AI performance is frequently limited by system-level bottlenecks.
The company delivers multiple industry-first innovations across semiconductors, software, and systems to unlock greater GPU utilization, reduce capital and power costs, and maximize data center efficiency.
Job Overview
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ASIC Design Verification Lead
Full time Only for registered members Saratoga
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ASIC Design Verification Lead
Only for registered members Saratoga, CA
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ASIC Design Verification Lead
Only for registered members Saratoga, CA
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Design Verification Lead
Only for registered members Cupertino, CA
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Design Verification Lead
Only for registered members Santa Clara
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Design Verification Lead
Only for registered members Sunnyvale
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Design Verification Lead
Only for registered members Sunnyvale
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Lead Verification Engineer
Only for registered members Sunnyvale, CA
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Design Verification Lead
Only for registered members Sunnyvale, CA
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Design Verification Lead
Only for registered members Santa Clara, CA
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Lead Physical Verification
Only for registered members San Francisco Bay Area
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Verification Team Lead
Only for registered members San Jose, CA
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Verification Team Lead
Only for registered members San Jose
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Lead Design Verification Engineer
Only for registered members Santa Clara
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Lead Design Verification Engineer
Full time Only for registered members US, California, Santa Clara
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SoC -Design Verification Lead
Only for registered members Sunnyvale
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Lead Design Verification Engineer
Full time Only for registered members Santa Clara
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Lead Design Verification Engineer
Only for registered members Santa Clara, CA
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SoC -Design Verification Lead
Only for registered members Sunnyvale, CA
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Technical Lead, Design Verification
Only for registered members US-CA - Santa Clara
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Lead Design Verification Engineer
Only for registered members US, California, Santa Clara