- 5+ years of ASIC, RTL, Memory Technologies experience
- Proficiency in owning and leading RTL design for custom memory controller sub-blocks
- Understanding of memory controller u-architecture
- Familiarity with memory technologies like LPDDR4/5, HBM
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Memory Controller Designer - Austin, United States - BayOne Solutions
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Description
Job Title: Memory Control Designer / RTL Engineer
Location: Austin TX, San Jose, CA, San Diego, CA (Hybrid)
Duration: 6+ months contract
Technical Focus:
Looking for an experienced designer to work on custom memory controller micro-architecture, specifically focusing on LPDDR5 technology. Collaborate with system architects, verification, performance, power, and design teams to drive RTL design, performance optimization, power efficiency, and logic debug for the memory controller.
Essential Skills:
Preference for knowledge in JEDEC memory standards, AES, ECC, and RAS features.