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    Performance Modeling Engineer - San Jose, United States - OPENEDGES Technology, Inc.

    OPENEDGES Technology, Inc.
    OPENEDGES Technology, Inc. San Jose, United States

    1 week ago

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    Description

    OPENEDGES develops AI Edge Computing semiconductor IPs, so that more people can enjoy AI technology closer.

    Location: San Jose, CA, USA or Austin, TX, USA

    Position: Staff Performance Modeling Engineer

    OPENEDGES is the world's only total memory system and AI platform IP solution company that has delivered NPU, memory controllers, DDR PHY, and on-chip interconnect IPs all together in one place since 2017.

    Roles & Responsibilities:

    OPENEDGES is currently seeking to build a team in the US with the goal of developing a configurable, cache-coherent Network-on-Chip (NoC) to add to its portfolio, enabling high-performance and highly efficient AI designs that require cache coherency. This is an exciting opportunity to work on a design from scratch that can significantly impact the field of AI. This role is based in San Jose, CA, or Austin, TX, with the possibility of hybrid/remote work.

    As a Staff Performance Modeling Engineer, you will play a critical role in architecting the performance model for the cache-coherent interconnect NoC. This will involve collaborating with cross-functional teams to explore architectural options, evaluate design alternatives, project performance, and balance power with performance trade-offs. You will also develop the simulation model infrastructure, performance model for the specific architectures, and support customers using the model.

    Your primary responsibilities will include:

    • Collaborating with cross-functional teams to develop performance models that drive the evaluation of new features and evolve into well-correlated models with our IP RTL designs
    • Modeling complex configurable designs and conducting performance analysis to inform architectural decisions
    • Creating a quantitative performance evaluation strategy
    • Performing performance simulations and measuring alternative designs
    • Analyzing workloads to identify performance bottlenecks and opportunities

    Job Requirements:

    We are looking for a highly motivated individual with the following qualifications:

    • MS or PhD in Computer Science, Electrical Engineering, or a related field
    • Strong experience in computer architecture, microarchitecture, performance, and networking
    • Consistent track record of success in modeling, analyzing, and debugging sophisticated IP designs
    • 8+ years of experience in performance modeling, simulation, analysis, and RTL correlation of SoC system performance, with a proven ability to provide effective solutions
    • Expertise in C++/Python, with a strong background in software architecture and design patterns, applied to various areas in performance modeling and tooling
    • Strong leadership skills and ability to set direction and work through ambiguities

    Preferences:

    • The ability to work in an entrepreneurial environment that fosters a collaborative and team-oriented atmosphere
    • Experience working in start-up environments or venture-backed firms
    • A self-starting orientation with a strong drive to make things happen
    • Experience in bringing up performance models for Network-on-Chip (NoC) is a definite plus
    • Experience/familiarity with the memory and compute challenges of neural network workloads

    Benefits:

    • Medical, dental, and vision benefits
    • Life insurance
    • 401k retirement plan
    • Paid time off, paid holidays, sick leave, etc.

    Location:

    • 2540 N. First Street, Suite 101, San Jose, CA, US (on-site/hybrid/remote)
    • Austin, TX (office coming soon)
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