DFT Engineer - San Francisco

We are looking for an experienced DFT Engineer with strong expertise in post-silicon structural test pattern debug and regeneration. This role requires hands-on experience with Siemens DFT/ATPG tools and close collaboration with tester teams to drive yield improvement and test ro ...

+We're building cutting-edge silicon solutions—and we're looking for a Lead-level DFT Engineerwho wants to push quality and test thinking earlier into the design lifecycle. · Push DFT into RTL as early as possible – influence architecture, not just implementation · Early DFT veri ...

We are seeking an experienced Design-for-Test (DFT) Contractor to support the testing and validation of next-generation semiconductor SoCs. · This role will work closely with Front-End and Physical Design teams to implement robust DFT and test solutions,directly contributing to R ...

Sivaltech is seeking a highly skilled and experienced Senior DFT Engineer for a full-time position in the San Francisco Bay Area. The role involves designing and implementing advanced Design-for-Test (DFT) solutions. · ...

Own post-silicon structural test pattern debug and regeneration, including ATPG, MBIST, Boundary Scan, and related DFT flows · Analyze pattern failures on silicon and drive corrective actions in collaboration with tester teams · Utilize Siemens DFT/ATPG tools to modify, validate, ...

We are open to hiring in Austin, TX; Palo Alto, CA. You will help drive the state-of-the-art in testability, debug and safety to achieve high test coverage, · quality, ...

A cutting-edge AI semiconductor company is hiring Silicon Physical Design Engineers to join its growing hardware team. This organization is focused on building highly efficient, high-performance silicon to power advanced generative AI systems at scale. · If you're driven by compl ...

A high-growth AI hardware company is hiring RTL Design Engineers to help develop next-generation compute platforms for large-scale machine learning workloads. The team is building vertically integrated silicon and system solutions designed to power advanced AI training and infere ...

h2>Job summary · We are seeking a senior PIC Test Manager with deep expertise in wafer-level optical and electrical test for Photonic Integrated Circuits (PICs). · h2> · 10+ years of experience in PIC test engineering, wafer-level probing, or photonics manufacturing test · ...

A high-growth AI hardware company is hiring RTL Design Engineers to help develop next-generation compute platforms for large-scale machine learning workloads. The team is building vertically integrated silicon and system solutions designed to power advanced AI training and infere ...

+Job summary · We are looking for a senior PIC Test Manager with strong expertise in wafer-level optical and electrical testing for Photonic Integrated Circuits (PICs). · +Own and define wafer-level PIC test strategy across multiple product lines through HVM. · Design scalable, h ...

SPAN is enabling electrification for all We are a mission-driven company designing building and deploying products that electrify the built environment reduce carbon emissions and slow the effects of climate change. · We're hiring talented individuals who are driven by success an ...

Saika Technologies looking for DFT Engineer with more than · 6 years of experience. · Perform full‑chip and block‑level static timing analysis · for advanced ASIC designs. · ...

· Looking for a Mixed-Signal Test Engineer for a cutting edge startup in the bay area.  Individual will be responsible for developing production automatic test solutions for mixed signal products containing analog, mixed-signal and power elements. · Requirements: · Experience in ...

Our Mission   · SPAN is enabling electrification for all · We are a mission-driven company designing, building, and deploying products that electrify the built environment, reduce carbon emissions, and slow the effects of climate change. · Decarbonization is the process to reduc ...

Cisco is seeking an experienced Test Engineer to join their Silicon Development team in San Jose, CA. In this role you will be expected to be onsite · 3 days a week minimum.You will be joining the Silicon Operations team focusing on post silicon ATE test bring-up. · ...

Midjourney is an independent research lab exploring new mediums of thought and expanding the imaginative powers of the human species. We are a small self-funded team focused on design, human infrastructure, and AI. · The Electrical Engineer is responsible for the electrical syste ...

Cisco seeks New Product Program Manager in San Jose, CA. You will support schedule for qualification plan, draft product plans, host core team meetings. · You will hold great customer service when speaking with customers and upper-level management. · ...

We are seeking a highly motivated Physical Design Engineer to join our ASIC implementation team. The ideal candidate is technically strong in advanced-node implementation, timing closure, and physical sign-off, while also being collaborative and team-oriented. · This role will co ...

Position Overview · We are seeking an experienced Frontend Synthesis / Static Timing Analysis (STA) Engineer to join our ASIC design team. This role will focus on RTL-to-gate-level implementation, timing closure, and optimization across complex digital designs. · The ideal candid ...