- Drive on-time library PDK release with highest quality, coordinate with the design owners and multiple stake holders in device, integration, OPC, DR, and runset for customer solutions.
- Ensure the timely development and test coverage to cover possible design usage scenario.
- Definition of copy exact foundational IP in collaboration with analog and IO designers in product groups and AD to support ESD protection needs in balancing ESD protection against the performance impact to the IO designs.
- Working with process device and reliability stake holders as part of DTCO to co optimize design, process modeling and design rules.
- Design library collateral schematics and layouts and characterizing them through all PV RV and ESD flows. #DesignEnablement Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.
- Analog circuit, device physics fundamentals.
- EDA solutions for layout and schematic designs.
- Coding skills in one of modern computing languages. Inside this Business Group As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art
- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused To view full details and how to apply, please login or create a Job Seeker account
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Analog engineer - Boise, United States - Idaho State Job Bank
Description
Analog engineer at Intel in Boise, Idaho, United States Job Description Job Description As a member of the Advanced Design Library technology group in TMG DE, you will be at the vanguard of designing analog foundational collateral on leading edge Intel processes to meet density and performance scaling goals of Intel CPU and SoC products.
AD serves as the design interface with the process development team working out key design process interactions for all new processes.
These collaterals include ESD diodes, Power clamps, analog transistors, resistors, capacitors, thermal sensing devices, and others.Your responsibilities will include, but are not limited to:
Minimum Qualifications:
Candidate must possess a MS degree with 3+ years of experience or PhD degree with 1+ years of experience in Electrical Engineering or related field.
3+ years of experience in the following: