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    Semiconductor Test Engineer - Phoenix, United States - Intel

    Intel
    Intel Phoenix, United States

    Found in: Lensa US 4 C2 - 1 day ago

    Intel background
    Description

    Job ID: JR Job Category: Engineering Primary Location: Phoenix, AZ US Other Locations: Job Type: Experienced Hire **Semiconductor Test Engineer**

    **Job Description**

    This position is for a Semiconductor Test Engineer at Intel within the Design Engineering Group (DEG). In this role, you will be expected to be a part of and participate in global Product Development Engineer (PDE) teams in developing Sort test programs to enable new Fab process development, and Intel's product roadmap. This role is a combination of hardware and software responsibilities that has visibility and interaction with multiple areas within Intel, that gives you the opportunity to feedback to Design and improve the product outgoing Quality.

    In this role responsibilities include, although not limited to:

    Ensures the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp

    Makes significant contributions to design, development and validation of testability circuits

    Evaluation, development and debug of complex test methods

    Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment

    Creates and tests validation and production test hardware solutions

    Tests, validates, modifies and redesigns circuits to guarantee component margin to specification

    Analyzes and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability

    Analyzes early customer returns with emphasis on driving test hole closure activities

    Creates and applies concepts for optimizing component production relative to both quality and cost constraints

    Autonomously plans and schedules own daily tasks, develops solutions to problems utilizing formal education and judgment

    Solve problems with sound logical thinking and logical analysis

    **Qualifications**

    Minimum Qualifications

    Candidate must have a Bachelor's Degree in Electrical Engineering Computer Engineering and/or Computer Science and 3+ years of experience OR a Master's degree in Electrical Engineering Computer Engineering and/or Computer Science and 2+ years, And experience in:

    Semiconductor test engineering or DFT or design

    Scripting in Python or Perl

    Preferred Qualifications

    ATE (Automated Test Equipment)(functional or structural)

    Semiconductor device test and design for test methods (DFT)

    Digital or Analog validation and test, Array Test Program Development in High Volume Manufacturing

    Advanced Statistical Data Analysis and data system automation

    **Inside this Business Group**

    In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations. DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

    **Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.**

    **Posting Statement**

    All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

    US Experienced Hire JR Phoenix Design Engineering Group

    **Information Our Partners Collect**

    **Your Choices**

    Always Active These technologies are necessary for the Intel experience to function and cannot be switched off in our systems. The technology is usually only set in response to actions made by the device owner which amount to a request for services, such as setting privacy preferences, logging in, filling in forms, maintaining secure login areas, maintaining state across pages (remembering items in a shopping basket), and server load balancing. The device owner can set their preference to block or alert Intel about these technologies, but some parts of the Intel experience will not work. These technologies do not store any personally identifiable information.

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    **Welcome**

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