Senior Analog Layout Engineer - Santa Clara

Only for registered members Santa Clara, United States

1 week ago

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$87,000 - $131,000 (USD)

Job summary

We are seeking an experienced Senior Analog Layout Engineer with strong expertise in high speed and precision analog layout design for deep sub micron FinFET technologies.

  • Perform custom analog layout design for high speed and precision analog circuits in advanced FinFET process technologies
  • Design and implement layout for high speed SerDes blocks, including: Equalizers PLLs Phase Interpolators CDRs
  • Develop layout for precision analog blocks such as ADCs DACs Execute floorplanning and support design sign off closure including handling Multiple power rails ESD requirements Integrate digital hard IPs into complex analog/mixed signal designs Perform DRC/LVS debugging and resolve layout related issues efficiently Utilize develop SKILL scripts to improve layout productivity automation Work closely with circuit designers verification process teams to ensure layout meets performance reliability manufacturability requirements This position description identifies the responsibilities tasks typically associated with the performance of the position Other relevant essential functions may be required.

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