FPGA DDR and IO Subsystem Architect - San Jose, California, United States

We are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. · ...

This is a highly visible technical leadership role requiring deep expertise in DDR and high-speed IO standards, silicon architecture, and cross-functional collaboration from early concept through production. · ...

We are now looking for a Senior I/O Architect for our NVLink chip to chip team · NVIDIA is seeking an experienced technical leader passionate about defining advanced chip interconnects and protocols. You'll be part of a team responsible for defining next generation communications ...

Job summary · NVIDIA is seeking an experienced technical leader passionate about defining advanced chip interconnects and protocols. · ...

Reality Labs focuses on delivering Meta's vision through AI-first wearables devices. The compute performance and power efficiency requirements require custom silicon. The Reality Labs wearables team is driving the state-of-the-art forward with highly integrated SoCs that leverage ...

We are now looking for a Senior I/O Architect for our NVLink chip to chip teamNVIDIA is seeking an experienced technical leader passionate about defining advanced chip interconnects and protocols. · Your base salary will be determined based on your location, experience, and the p ...

We are now looking for a Senior I/O Architect for our NVLink chip to chip team. · ...

We are now looking for a Senior I/O Architect for our NVLink chip to chip team · NVIDIA is seeking an experienced technical leader passionate about defining advanced chip interconnects and protocols. You'll be part of a team responsible for defining next generation communications ...

We are looking for a SoC Architect to join the team in defining the next generation of Adaptive and Embedded SoCs. You will drive novel SoC architecture solutions across a wide range of applications, including Embedded Computing, AI/ML, Data Center, Communications, Automotive, an ...

We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. · Strong technical background architecting SoC and I/O subsystems involving PCIe an ...

We are looking for a Senior SoC Architect to join our team in defining the next generation of Adaptive and Embedded SoCs. You will drive novel SoC architecture solutions across a wide range of applications. · Responsible for driving low-power, cost-optimized SoC architectures wit ...

We are looking for a Senior SoC Architect to join our team in defining the next generation of Adaptive and Embedded SoCs.As a Senior SoC Architect you will help drive new architecture initiatives that leverage the state-of-art Core (e.g. x86, RISC-V, ARM), I/O (e.g. PCIe Ethernet ...

The job is for a Verification Engineer. The engineer will review and develop test plans and prioritize features based on architecture and specification. Strong skills in creating verification environments using UVM are required. · ...

We are seeking a SoC Architect to join our adaptive SoC Architecture team. This role is pivotal in defining and driving architecture for next-generation Adaptive SoCs, with on Processor subsystems, Interconnect, AI, GPU, video processing pipelines, and memory systems. · ...

+Join AMD in shaping the future of AI and beyond. · +Drive architecture of key IPs including their PPA tradeoffs, Interconnect,and integration into SoC · , ...

We are working on a CXL/PCIe-based chip for cloud computing applications. We're expanding our team and looking to add an ASIC Architect to our teamProven track record of successful deployment of architectures/architecture features in SoC products. · Proficiency in evaluating arch ...

The High-Speed I/O Architect defines and designs innovative on-chip interconnect architectures-coherent and non-coherent-for scalable SoC platforms. Collaborating with multi-functional teams, you'll shape the interconnect infrastructure that powers next-generation SoCs. · Archite ...

We are hiring a Head of Design Verification – Interface IP to own and scale verification for all major interface IP subsystems across Etched silicon. · ...

We are looking for a Principal High-Speed I/O Architect to define and design innovative on-chip interconnect architectures. · You will work across markets including mobile, automotive, datacenter, networking, and IoT. · ...

We are hiring a Head of Design Verification – Interface IP to own and scale verification for all major interface IP subsystems across Etched silicon. · You will lead Interface IP DV from architecture definition through tape-out, · working closely with RTL designers, IP vendors, S ...